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MediaTek

Synopsys, June 4, 2024

Silicon.da: The First Integrated SLM Analytics Solution from Design Through Manufacturing

Today’s advanced node chip designs are faced with many new complexities which require more verification, more validation and more analysis. The resulting data from these… Read More »Silicon.da: The First Integrated SLM Analytics Solution from Design Through Manufacturing

Cadence

Happy Hanukkah, Merry Christmas – 2023

Previous years: 2022 2021 2020 2019 2018 2017 2016 The @AgileAnalog team would like to send Season’s Greetings to all our customers and partners across the globe. It has been another… Read More »Happy Hanukkah, Merry Christmas – 2023

Cadence, November 2 2023

IR 2.0 – Building a New Paradigm for Power Integrity Design and Analysis

Power integrity (PI) is a major challenge for chip designers in the era of ubiquitous data, hyperconnectivity, and AI. Design size is exploding, and innovations… Read More »IR 2.0 – Building a New Paradigm for Power Integrity Design and Analysis

TSMC 2023

TSMC 2023 North America OIP Ecosystem Forum

Learn About: Emerging advanced node design challenges and corresponding design flows and methodologies for N2, N3/N3E/N3P/N3AE, N4/N4P, N5/N5A, N6/N6e/N6RF/N7, N12e, and N22 Latest updates on… Read More »TSMC 2023 North America OIP Ecosystem Forum