In 2021 Siemens EDA released CDC Assist. CDC Assist is an ML powered feature that empowers users to configure, debug, and close CDC on designs more rapidly. Following the success of CDC Assist, Siemens introduced…
Designers increasingly use complex reset signaling architectures to meet high-performance, low-latency, and low-power requirements. Specifically, independent reset domains are created by complex reset sequences, reset circuitry, and the intermixing of IPs with different reset schemas,…
As designs get increasingly complex, design teams are looking to find bugs earlier, to reduce rework and shorten time-to-market. The ultimate “shift left” is to put easy-to-use static verification in the hands of RTL designers…
Today’s million gates integrated circuits (ICs) involve various intellectual properties (IPs) interfacing with each other through multiple asynchronous clock and reset domains. Ensuring all clocks propagate concurrently across each clock tree components used as clock…
Low power is an increasingly critical requirement for all modern SoCs. Moreover, it is becoming more and more difficult with complex architectures being used in modern designs. This has made it necessary for designers to invest heavily in this verification effort throughout…