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RISC-V

Synopsys, May 30, 2024

Addressing Real-Time Workloads in Automotive Applications with Efficient ARC-V Processors

Many automotive applications require processing workloads with minimum latency and precise timing budgets.  This is especially true for safety-critical applications like adaptive cruise control and… Read More »Addressing Real-Time Workloads in Automotive Applications with Efficient ARC-V Processors

Synopsys, May 22, 2024

Accelerating AI Applications Using Custom RISC-V based SIMD/VLIW DSPs

The revolution in AI triggers an increased awareness for application-specific instruction-set processors (ASIPs). These processors implement a specialized instruction-set architecture (ISA) tailored to the AI… Read More »Accelerating AI Applications Using Custom RISC-V based SIMD/VLIW DSPs

Mirabilis, April 18, 2024

Optimizing Chiplet architectures of RISC-V clusters, GPU and DNN using System-Level IP

Multi-die SoC containing multiple RISC-V clusters, GPU, NPU, accelerators and DNN have considerable benefits for applications in automotive, space and industrial. Architecture exploration of the… Read More »Optimizing Chiplet architectures of RISC-V clusters, GPU and DNN using System-Level IP

Mirabilis, 18 April 2024

Optimizing Chiplet architectures of RISC-V clusters, GPU and DNN using System-Level IP

Multi-die SoC containing multiple RISC-V clusters, GPU, NPU, accelerators and DNN have considerable benefits for applications in automotive, space and industrial. Architecture exploration of the… Read More »Optimizing Chiplet architectures of RISC-V clusters, GPU and DNN using System-Level IP