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28th Electronic Design Process Symposium

November 4 @ 8:00 am - November 5 @ 5:00 pm PDT

EDPS

In 2021, the Electronic Design Process Symposium (EDPS) is in its 28th year, and it continues to serve as a leading forum for thought leaders of the design community from industry participants as well as academia. We invite industry leaders to discuss state-of-the-art improvements to the electronic design processes and CAD methodologies, emphasizing trends and new paradigms, rather than on the functions of the individual tools themselves.

The 2021 symposium is now in the planning phase. As designs get more complex, the design, test and manufacturing cycles are getting longer and more intertwined with each other. Therefore, EDPS will continue to extensively cover test, manufacturing, validation, and security issues as they pertain to the design of chips/systems. We are planning sessions to provide a holistic view of design, test, validation, and manufacturing issues. We will also cover new developments in systems approach to design and manufacturing, AI for design and design for AI, and advanced technologies and tools that support these areas.

Please note that most of the talks and papers from the last 21 years of EDPS are now available, and searchable, on the Prior Years page.

Our keynote speakers are:

Len Orlando, Air Force Research Laboratory – Air Force Perspective on the Application of Machine Learning for Microelectronics Design and Security

Brandon Wang, Synopsys, VP – AI for Design and Design for AI

Jeff Dyck, Siemens EDA, Director of Engineering – Getting Right Answers with Machine Learning

Venkat Thavantri, Cadence, VP of R&D – Cadence Cerebrus Machine Learning Chip Design Flow Optimization Delivers a Productivity Revolution

David Pellerin, Amazon Web Services, Business Development – Designing for Trust in a Zero-Trust World – Perspectives from the Cloud

John Acken, Portland University – Security for the Electrical Grid

Subhasish Mitra, Stanford – 21st-Century NanoSystems for Abundant-Data Computing: N3XT 3D, Illusion Scaleup, Co-Design

Prith Banerjee, Ansys, Chief Technology Officer – Ansys Long Term Strategy to Enable Simulation Based Product Innovation

Claudionor Coelho, AI Palo Alto Networks/Google, VP/Fellow for AI – Beyond AI: From Application-Specific ML Models to Neurosymbolic Computation

Marco Fiorentino, HPE/HPLabs, Distinguished Technologist – An open Silicon Photonics ecosystem for computercom applications

Jay Pathak, Ansys, Director of R&D in CTO Office – ML-based PDE Solvers

Jigesh Patel, Synopsys Product Manager- Modeling Photonic Integrated Circuits: Custom Design and E-O Cosimulation

Patrick Groeneveld, Cerebras Systems, Advanced Machine Learning Hardware

Details

Start:
November 4 @ 8:00 am PDT
End:
November 5 @ 5:00 pm PDT
Event Category:
Event Tags:
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Event Website

Organizer

IEEE
View Organizer Website

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