DVClub Europe – September 2024

This DVClub event will have talks on verification of low power features of VLSI designs, discussing strategies for accurately measuring power consumption and ensuring that power-saving mechanisms are effective. Additionally, speakers will share insights on how to simulate and analyze different power scenarios to identify potential issues and optimize power management techniques. Attendees will have the opportunity to learn best practices for low power verification and gain valuable knowledge on how to successfully implement energy-efficient designs in their projects. Overall, this event promises to provide valuable insights and practical strategies for ensuring the success of low power verification in VLSI designs.

Agenda (BST)
12:00 Welcome and Introduction – Mike Bartley, Tessolve
12:00 Satinder Paul
12:20 Synopsys
12:40 TBD
13:00 Close