A worldwide connected Event !!
D&R IP-SoC Japan 2024 Day is the unique worldwide Spring event fully dedicated to IP (Silicon Intellectual Property) and IP based Electronic Systems.
IP-SoC providers, the seed of innovation in Electronic Industry, are invited to highlight their latest products and services and share their vision about the next innovation steps in the Electronic Industry.
IP consumers can view at a glance the latest Technology trends and exciting Innovative IP/SoC products. Through a global view, Electronic systems leaders may identify disruptive innovation leading to new market segment growth.
Any question? Please contact us
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9:00 am
Welcome |
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Welcome to the IP-SoC community
Gabrièle Saucier
CEO
Design And Reuse
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Adding Intelligence in Green Technology
Philippe Flatresse
Product Marketing
Soitec
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9:40 am
Break |
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10:00 am
Analog and Memory IP
Chairperson: Gabrièle Saucier, D&R
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High-performance PLL frequency synthesizers for wireless and wireline communications
M. Annamalai Arasu
Director, R&D
CM Engineering Labs Singapore Pte. Ltd
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The Uniquely Suitable eNVM Ip for Auto Grade MCU from Floadia
Yasuhiro Taniguchi
CTO and COO
Floadia Corporation
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Semiconductor IPs for Memory, Flash storage and wireless applications
Ravi Thummarukudy
CEO
Mobiveil Inc.
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11:00 am
Break |
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11:20 am
Interface IP
Chairperson: Gabrièle Saucier, D&R
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High Speed Interface, keys and Trend
Junzoh Shimizu
CEO & President
Silicon Library Inc.
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Scaling Hyperscale Data Centers for AI Workloads with High-Speed Interface IP
Hiroyuki Hasegawa
Application Engineering Manager
Synopsys, Inc.
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12:00 pm
Lunch Break |
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1:00 pm
Design Platform
Chairperson: Philippe Flatresse, Soitec
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The Critical Role of Embedded Monitor IP in Enabling Silicon Lifecycle Management Use Cases
Yuya Suzuki
Applications Engineering, Staff Engineer
Synopsys, Inc.
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Architecture challenges in meeting power, thermal and performance needs in partitioning Chiplets for rapid deployment
Deepak Shankar and Shuzo Tanaka
Founder
Mirabilis Design Inc.
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Curious’ latest High Performance IP Introduction
Ken ichi Shimomura
Director of Design department
Curious Corp.
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Embedded Programmable Logic – A risk insurance for your next chip design
Yoan Dupret
Menta
Online Only
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2:00 pm
Break |
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2:20 pm
Artificial Intelligence
Chairperson: Philippe Flatresse, Soitec
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Meeting the Needs of AI Training with HBM3E
Motoyasu Kobayashi
Director of Sales
Rambus, Inc.
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Scalable, Flexible Edge AI accelerator: Silicon-Proven IP for Consumer Electronics
ChangSoo Kim
CEO
AiM Future, Inc.
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Enabling Multimodal AI on Edge Devices
Shanghung Lin
VP, Vision and Image Product
Verisilicon
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3:20 pm
Break |
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3:40 pm
Security and high safety Solutions
Chairperson: Philippe Flatresse, Soitec
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Quantum Safe Cryptography: Protecting Devices and Data in the Quantum Era
Toru Furukawa
Senior Field Application Engineer
Rambus, Inc.
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Future-Proof Your Design with Hardware-Based Post-Quantum Cryptographic IP Cores
Dr. Matti Tommiska
Xiphera Ltd
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Security From Chip-To-Cloud with PQC (Post Quantum Cryptography)
Ahmed BOUGRIANE
Pre-Sales Engineer North Asia
Secure-IC
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How SafeIP(TM) enables fail operational vehicles, robotics and drones
Benjamin Weinhardt
Head of Business & Collaboration
Siliconally GmbH
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5:00 pm
Video IP
Chairperson: Philippe Flatresse, Soitec
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Video Codecs Landscape and Challenges Ahead
Yujing Wei
VP, APAC Business Development
Allegro DVT
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6:00 pm
Event Closure |
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