Keysight EDA 2024

Shift Left to Raise Design Productivity

We’re ready to demo the latest release of our suite of electronic design automation (EDA) software tools so that you can learn how to increase productivity by shifting left your design process and product development cycles.

Four Tracks to Choose from

We’ll kick off each session with an overview of the Keysight EDA 2024 roadmap from VP and General Manager Niels Faché, and then you’ll pick the track you are most interested in for the highlights and demo videos.

Track 1: PathWave ADS for RF Circuit Design

• See how faster EM solvers and streamlined, interoperable workflows accelerate complex module designs that integrate multiple technologies.
• Learn how accelerated electro-thermal modeling and other new technologies reduce design risks and catch performance issues early.
• See how expanded Python automation is not only transforming multi-technology workflows but also accelerating productivity for common design tasks, including new applications for PA designers.

Track 2: PathWave RF System Design

• Learn how to analyze 5G NTN and DVB-S2/S2X scenarios with new RF link-level and channel-modeling simulation.
• See how new phased-array simulations accurately model the load pull interaction between the power amplifiers and the active array impedance.
• Learn how the RF System Explorer integrates circuit and system designs by enabling RF system engineers to share designs between RF system and circuit level design teams.

Track 3: PathWave ADS for High-Speed Digital Design

• Learn how to design for the latest interconnect technologies (DDR5 and PCIe6) and investigate pathfinding for future technologies using an end-to-end simulation workflow for signal and power integrity.
• See industry-leading capabilities to optimize signal and power performance, including multi-level modulations (PAM3/4), decision feedback equalization (DFE), and simulations for conducted EMI.

Track 4: Device Modeling and Characterization

• Learn how to deliver accurate models faster for silicon CMOS, bipolar, and compound semiconductors to accelerate your technology innovations.
• See the latest enhancements we’ve added to our device modeling arsenal, which could slash model extraction time by >70%.
• Learn about best practices for model re-centering, fast model verification, automated de-embedding, and accurate random telegraph noise measurement and data analysis.