Skip to content
Loading Events

« All Events

  • This event has passed.

Mapping signal processing algorithms on AMD-Xilinx Versal to meet timing and power constraints

October 11, 2023 @ 9:00 am - 10:00 am PDT

Mirabilis, October 11, 2023

In this Webinar, we will focus on the performance-power-area trade-off in implementing signal processing algorithms on Xilinx FPGA by partitioning the tasks of the algorithms onto the processors, logic and AI Engines resident in the AMD-Xilinx Versal FPGA. 

Key Takeaways:

  • Discover the inner workings of FPGA components: Processor, Logic Elements, AIE/Tensor, and more.
  • Understand latency and throughput trade-offs when using NoC vs. direct interfaces.
  • Learn how different data cache sizes impact AIE Tile network utilization.
  • Dive into various mapping decisions and their effect on application throughput and power consumption.


So, what are you waiting for? Don’t miss this opportunity


October 11, 2023
9:00 am - 10:00 am PDT
Event Categories:
, ,
Event Tags:
, ,
Event Website


View Organizer Website

Leave a Reply

Your email address will not be published. Required fields are marked *