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Learn How to Efficiently Achieve Accurate Experimental Etch Profiles in FinFET and Memory Applications with Victory Process
August 11 @ 10:00 am - 10:30 am PDT
When employing process simulation to generate a complex device structure, TCAD engineers often face the task of reproducing the exact etch profile that has been observed in semiconductor fabrication. Silvaco Victory Process offers several geometric models to efficiently achieve etch geometries that accurately match microscopy images (e.g., transmission electron microscopy).
In this webinar, we present these geometric etch models in the context of FinFET and memory applications. We demonstrate techniques to realize fin shaping, non-ideal etch profiles (bowing, twisting), and self-aligned processes (multi-patterning).
What You Will Learn
- How to achieve accurate etch profiles as observed on microscopy images
- How to efficiently use Silvaco Victory Process to achieve fin shapes in FinFET flows
- How apply geometric etch modes for trenches and contact holes in memory applications (3D NAND)
- How to use Silvaco Victory Process’s powerful and adaptable ETCH DRY and ETCH POLYLINE commands
Alexander Toifl, Development Engineer, Silvaco TCAD DivisionSince joining Silvaco in 2021, he has worked on etch and deposition models in Victory Process. Alexander Toifl received a doctoral degree in electrical engineering from the University of Technology Vienna (TU Wien), Austria, and a M.S. degree in microelectronics and photonics from the same institution.
WHO SHOULD ATTEND:
Engineers and management looking for solutions to efficiently achieve etch profiles in a process TCAD flow.