With the formal release of the HBM3 specification, memory bandwidth for AI/ML and HPC shifts to a higher gear. Terabytes of bandwidth are possible using HBM3’s 2.5D/3D architecture. Join memory expert Frank Ferro as he discusses what changes come with the new generation of HBM, and how the Rambus HBM3 memory subsystem can help designers unleash the full power of their HBM3-enabled accelerators and SoCs.
In this webinar, you will learn:
Capabilities of HBM3 memory
Design considerations for HBM3 2D/3D implementations
Features of the Rambus HBM3 Memory Interface Subsystem
