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Optimizing Fault Simulations with Formal Analysis to Achieve ASIL Compliance for Automotive Designs

June 29 @ 10:00 am - 11:00 am PDT

Synopsys, June 29, 2022

Most safety critical SoCs, such as those developed for automotive driver aid systems, require ASIL-D compliance. ASIL-D is the highest grade in the ISO 26262 Standard’s risk classification system, required less than 1% Single Point Fault. According to the ISO 26262 Standard, fault campaign on the targeted designs is the recommended methodology to generate FMEDA report and safety manual as metrics to demonstrate compliance.

The typical fault injection campaign is executed using a fault simulator. This methodology often requires long fault simulation time and significant user manual effort to analyze fault classification results. Use of formal technology can help improve verification efficiency and save manual effort.

In this Synopsys webinar, we will showcase an improved fault injection campaign methodology using a memory controller IP. Fault simulation is conducted using Synopsys Z01X. Synopsys VC Formal FuSa App is used to prune safe faults, hence reducing fault simulation runtime, and refine fault classification to reduce manual analysis effort. Both technologies work off of the shared fault database. A couple of proposed flows are compared to offer insight on the best flow to provide the shortest turnaround time, as well as repeatability and portability. The results demonstrate the advantages of including formal functional safety analysis in any fault campaign to meet ISO 26262 requirements efficiently.

Speakers

Listed below are the industry leaders scheduled to speak.

Tareq Altakrouri

Applications Engineer, Sr. Staff
Synopsys

Tareq Altakrouri is an Applications Engineer at Synopsys. He has been in the EDA industry for over 25 years working on verification, including simulation, assertion, formal and static technologies, and advanced verification methodologies. Currently, Tareq drives adoption of formal technology at multiple accounts in Texas.

Vaibhav Kumar

Sr. Manager, Digital IP
NXP Semiconductors

Vaibhav is Senior Manager in the Digital IP group of NXP Austin. He has 15+ years of experience and has worked on IP verification, SoC verification, validation and emulation. He owns verification of several critical IPs for NXP at Austin

Details

Date:
June 29
Time:
10:00 am - 11:00 am PDT
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Organizer

Synopsys
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