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Verifying the next generation High Bandwidth Memory controllers for AI and HPC applications

October 30, 2024 @ 9:00 am - 10:00 am PDT

Siemens, October 30, 2024

High Bandwidth Memory (HBM) has revolutionized AI, machine learning, and High-Performance Computing by significantly increasing data transfer speeds and alleviating performance bottlenecks. The introduction of next-generation HBM4 is especially transformative, enabling faster training and execution of complex AI models. JEDEC has announced that the HBM4 specification is nearing finalization. In this webinar, you will learn how Siemens’s scalable and customizable Avery HBM Verification IP helps companies like Rambus verify their industry-leading HBM4 Controller IP through rigorous testing to ensure reliability and performance.

 

What You Will Learn: 

  • What’s new in HBM4
  • Challenges involved in verifying advanced HBM generations
  • Unique features in Siemens’s HBM4 memory models
  • Rambus’s newly-announced HBM4 memory controller IP

Who Should Attend: 

  • Design & Verification Engineers, Architects
  • Managers and Directors for memory controllers

What/Which Products are Covered:  

  • Siemens Avery HBM4 Verification IP
  • Rambus HBM4 Memory Controller
Speakers:
Kamlesh Mulchandani
Kamlesh Mulchandani
Application Engineering Consultant, Siemens EDA

Kamlesh Mulchandani is an Application Engineering Consultant at Siemens EDA. In his role as a Verification IP AE, Kamlesh bridges the gap between Verification IP technology and customer needs through collaboration, technical support and by tailoring Siemens solutions for specific user applications. Prior to Siemens, Kamlesh worked at Cadence as a Memory Subsystem Design & Verification Engineer where he worked on verifying LPDDRx/DDRx & GDDRx IPs.

Nidish Kamath
Nidish Kamath
Director of Product Management for Memory Interface IP, Rambus

Nidish Kamath is the Director of Product Management for Memory Interface IP at Rambus.  He previously held marketing and product management roles at AMD, Kioxia (formerly Toshiba Memory), Avalanche Technologies, Brocade and Qualcomm, where he worked on computational storage, SmartNICs and GPU cluster networking solutions. He has served in various standards and industry associations such as SNIA, Center for Open Source Software (CROSS), CXL Consortium, UEC and JEDEC.

Details

Date:
October 30, 2024
Time:
9:00 am - 10:00 am PDT
Event Categories:
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Website:
Event Website

Organizer

Siemens
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