Customers Discuss Their Real World Use of High-Level Synthesis
Summary The focus of this seminar is to have real-world customers present their successes using Catapult High-Level Synthesis (HLS) in markets such as Automotive, 5G/Communications, Video/Imaging, AI/ML, and MEMs Sensors.… Customers Discuss Their Real World Use of High-Level Synthesis
CadenceLIVE 2022 – Silicon Valley
Cadence San JoseAre you driving design change or feel you’ve overcome challenges that could impact the electronic revolution? CadenceLIVE™ offers you an opportunity to tell your story. Showcase your expertise and offer… CadenceLIVE 2022 – Silicon Valley
How to Eliminate Image Retention Issues with SmartSpice Flex Modeling
Image retention is a long-standing issue in the display community. To effectively solve this issue, or even to minimize its impact on their products, display manufacturers and consumer electronics vendors… How to Eliminate Image Retention Issues with SmartSpice Flex Modeling
5X Faster Equivalence Checking with Formality ML-driven DPX
Synopsys’ Fusion Compiler provides a broad spectrum of aggressive optimization techniques such as retiming, multibit banking and advanced data-path optimization that our designers want to take advantage of to achieve… 5X Faster Equivalence Checking with Formality ML-driven DPX
Better FPGA Verification with VHDL – Faster than “Lite” Verification Component Development with OSVVM
Some methodologies (or frameworks) are so complex that you need a script to create the initial starting point for writing verification components, test cases, and/or the test harness. SystemVerilog +… Better FPGA Verification with VHDL – Faster than “Lite” Verification Component Development with OSVVM