-
How Designing a Custom ASIC Chip Will Help Scientists Detect Neutrinos From Outer Space
Join us on Thursday, November 3rd to learn how Lawrence Berkeley National Laboratory, Fermilab, and Brookhaven National Laboratory collaborated and designed a custom ASIC chip to run at extremely cold temperatures, so that it can detect neutrinos! Register Today! Here’s what you can learn: Why study neutrinos and how to detect them DUNE experiment –… How Designing a Custom ASIC Chip Will Help Scientists Detect Neutrinos From Outer Space
-
TSMC 2022 EU OIP Ecosystem Forum
Hilton Amsterdam Airport Schiphol Schiphol Boulevard 701 Amsterdam, Amsterdam, NetherlandsLearn About: Emerging advanced node design challenges and corresponding design flows and methodologies for N3/N3E, N4/N4P, N5/N5A, N6/N7, N12e, N22, and 28eF technologies Latest 3DIC chip stacking and advanced packaging processes, and innovative 3DIC design enablement technologies and solutions targeting HPC and mobile applications Updated design solutions for specialty technologies enabling ultra-low voltage, analog migration,… TSMC 2022 EU OIP Ecosystem Forum
-
Ethernet & IP @ Automotive Technology Day
PACIFICO Yokohama North 1 Chome-1-2 Minatomirai, Nishi Ward, Yokohama, JapanOnsite registration may be limited, register now to be sure to get admission. The 2022 IEEE SA Ethernet & IP @ Automotive Technology Day (E&IP@ATD) is the premier venue for automobile manufacturers, suppliers, semiconductor vendors, tool providers, engineers, scientists, educators, and the media to share ground breaking ideas along with implementation strategies and applications related… Ethernet & IP @ Automotive Technology Day
-
Achieving Fast Turnaround Time of Functional ECOs with Synopsys Formality ECO
Functional ECOs (engineering change orders) are an important part of the design cycle, enabling design teams to respond quickly to frequent, unexpected, and last-minute register-transfer logic (RTL) functional changes. ECOs are unavoidable, however, they are necessary to fix functional verification bugs or to add critical new features, which enable designers to deliver products with minimal… Achieving Fast Turnaround Time of Functional ECOs with Synopsys Formality ECO
-
Accelerated development in Automotive E/E Systems using VisualSim Architect
We have put together a webinar on November 10th titled: Accelerated development in Automotive E/E Systems using VisualSim Architect . We will provide an introduction to the available features and utilities in VisualSim architect for Automotive Networking, Hardware ECU and Software design exploration. We will present use cases in ADAS, braking, FuSa, AI accelerator enhanced… Accelerated development in Automotive E/E Systems using VisualSim Architect
-
Engineering best practices for Python-based testbenches with cocotb
Writing code is easy. Reading code is hard. Maintaining code is hard. Writing "good" code is hard. So what's "good code"? Don't despair: the software engineering community has come up with tons of practical solutions! Now it's time to apply them to your next Python verification project with cocotb. In this talk, we'll look at… Engineering best practices for Python-based testbenches with cocotb
-
Super Computing 2022
Kay Bailey Hutchison Convention Center 650 S Griffin Street, Dallas, TX, United StatesCome see your friends and colleagues, explore incredible learning experiences in HPC, and walk the exhibit floor! There are several registration options available. Choose the one that’s right for you. We look forward to seeing you in Dallas or via the Digital Experience.
-
Three Issues Every EE Needs to Overcome to Sign Off on High-Speed PCB Designs
Signal integrity/power integrity (SI/PI) are top priorities for engineers designing today’s high-speed, high-density circuit boards. Faster signoff of designs can be achieved by uncovering signal SI/PI issues early in the design process. This webinar will highlight three key issues engineers need to overcome to sign off on high-speed PCB designs: serial link compliance (SerDes), power… Three Issues Every EE Needs to Overcome to Sign Off on High-Speed PCB Designs
-
Semicon Europa
Messe Munchen Messegelände, Munich, GermanySEMICON Europa 2022 is co-located with electronica in Munich, Germany creating the strongest single event for electronics manufacturing in Europe, and broadening the range of attendees across the electronics chain. - Top-notch Keynotes - Market Trends - Exhibition - Networking - Advanced Packaging Forum / Fab Management Forum - ITF Beyond 5G -powered by imec… Semicon Europa
-
The Era of Chiplets and Heterogeneous Integration: Challenges and Emerging Solutions to Support 2.5D and 3D Advanced Packaging
As the semiconductor industry adopts chiplets and heterogeneous integration for its packaging as a key enabler to the continuation of scaling beyond Moore’s law, it has created new challenges. Join us on Wednesday, November 16 at 9:00 a.m. PST for an informative webinar on The Era of Chiplets and Heterogeneous Integration: Challenges and Emerging Solutions… The Era of Chiplets and Heterogeneous Integration: Challenges and Emerging Solutions to Support 2.5D and 3D Advanced Packaging
-
ASIP University Day 2022
Application-specific instruction set processors (ASIPs) have established themselves as an important implementation option for modern SoCs, i.e. when standard processor IP cannot meet challenging application-specific requirements, and fixed hardware is not flexible enough. Synopsys’ ASIP Designer is the market leading tool for ASIP design, verification and programming, and is used by leading companies around the… ASIP University Day 2022
-
TCAD Seminar 2022
Join our online TCAD Seminar to learn about the application of Synopsys TCAD solutions to accelerate the research, development, and optimization of semiconductor technologies. The seminar sessions cover all major semiconductor technologies, from advanced logic and memory to analog, and power electronics. The solutions presented in this event are based on the industry-standard Sentaurus TCAD… TCAD Seminar 2022
12 events found.