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Introduction to the Open-source EDA Ecosystem
Open-source hardware in the European Chips Act Matthew Xuereb, European Commission Free and open-source semiconductor ecosystem Luca Alloatti, Free Silicon Foundation ETS Open-source EDA software and semiconductor design Jean-Paul Chaput, Sorbonne University, Coriolis Foundation European roadmap on the advancement of open-source EDA tools Rihards Novickis, Latvian Institute of Electronics and Computer Science
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Ansys – Simulation World 2024
Did you know that simulation helped Pratt & Whitney design a game-changing engine architecture that has saved aircraft operators over a million gallons in fuel? Or that sustainable energy start-up Amogy is using simulation to build a novel, portable, carbon-free energy system to convert ammonia into renewable fuel that will power green transportation solutions of the future? Or that… Ansys – Simulation World 2024
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Innovative Technologies, Tools, and Methodologies for Space Applications
In the world of space applications, reliability is paramount. As the space sector continues to experience rapid growth and evolution, new challenges are emerging to meet the demands of various mission types and requirements, such as robust functional safety protections, high reliability, and dependable operation. Join us for an exclusive panel discussion hosted by Lattice… Innovative Technologies, Tools, and Methodologies for Space Applications
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Keysight EDA Connect Tour – Burlington
Eddie V's Restaurant 50 South Avenue, Burlington, MA, United StatesAs AI is redefining communication and connectivity, your ability to design, simulate, and test — using an intelligent and automated workflow — is what will set you apart. Join us for a half-day event that brings together top industry experts and innovators to explore modern RF circuit and system design, including advanced topics like phased… Keysight EDA Connect Tour – Burlington
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AI-Driven EM-IR Design Closure
IR drop closure is becoming a major challenge for designers on advanced nodes. The number of violations at signoff has increased significantly, leading to longer turnaround time (TAT) or violations being waived. To solve this challenge, IR drop needs to be addressed early in the implementation phase with an automated IR prevention and fixing methodology.… AI-Driven EM-IR Design Closure
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Embedded Vision Summit 2024
Santa Clara Convention Center 5001 Great America Parkway, Santa Clara, CA, United StatesThe Summit attracts a global audience of technology professionals from companies developing computer vision and edge AI-enabled products including embedded systems, cloud solutions and mobile applications. Why Attend? It's a First-Rate Program with Powerful Insights into Practical Perceptual AI. Join us for three days of learning—from tutorials to Deep-Dive Day, covering the latest technical insights,… Embedded Vision Summit 2024
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Verification Academy Live: El Segundo
Embassy Suites by Hilton, LAX South 1440 East Imperial Avenue, El Segundo, CA, United StatesEmbassy Suites by Hilton, LAX South 1440 East Imperial Avenue El Segundo, CA 90245 +1 (310) 640-3600 This event is in-person only -- there is no support for remote participation. Agenda 9:30 – 10:00 Registration and Check-in Coffee and networking with your peers. 10:00 – 10:05 Welcome / Intro Todd Holbrook | Sr. Application Engineering Manager,… Verification Academy Live: El Segundo
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The Next Generation of 3DIC Interposer/InFO Design
In recent years, the semiconductor industry has experienced a breakthrough in the onset of 2.5D and 3D chiplet-based products. These products promise to extend the limits of Moore’s Law while demolishing limitations on speed and capacity for our highest tiers of compute. But for all the adulation we heap upon the 3DIC paradigm, we seemingly… The Next Generation of 3DIC Interposer/InFO Design
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Accelerating AI Applications Using Custom RISC-V based SIMD/VLIW DSPs
The revolution in AI triggers an increased awareness for application-specific instruction-set processors (ASIPs). These processors implement a specialized instruction-set architecture (ISA) tailored to the AI application domain, often starting from a baseline such as the RISC-V ISA. ASIPs can replace traditional fixed-function hardware accelerators, thereby introducing software-programmability in the AI acceleration domain, and thus more… Accelerating AI Applications Using Custom RISC-V based SIMD/VLIW DSPs
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Questa RDC Assist – Improving designer productivity and enabling faster RDC verification closure with machine learning
In 2021 Siemens EDA released CDC Assist. CDC Assist is an ML powered feature that empowers users to configure, debug, and close CDC on designs more rapidly. Following the success of CDC Assist, Siemens introduced RDC Assist in 2023. Using the same ML technology in CDC Assist, RDC Assist dramatically improves the time and… Questa RDC Assist – Improving designer productivity and enabling faster RDC verification closure with machine learning
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Addressing the Challenges of PCB Design for Manufacturing
Manufacturing issues can be a big reason why your project timelines get derailed and even result in costly failures. By understanding common errors that occur while designing or creating your fabrication and assembly documentation, you can avoid making the same mistakes on future designs. With access to over 80 comprehensive Design for Test (DFT), Design… Addressing the Challenges of PCB Design for Manufacturing
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Debugging Features of UVM
A UVM testbench is a large and complex piece of software. Like any other large and complex piece of software, a verification environment written using UVM will require debugging at some stage. There are various debugging features built into UVM to help with this. In this one-hour webinar, Doulos Senior Member Technical Staff Doug Smith… Debugging Features of UVM
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