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  • Silvaco UseRs Global Event (SURGE) 2023 – Taiwan/Singapore

    Silvaco UseRs Global Events (SURGE) bring together users, developers, and industry experts of the EDA, IP, and TCAD communities to understand new semiconductor technologies, innovative applications, and techniques for realizing advanced designs. Presentations A variety of presentations will cover semiconductor device simulation, circuit design and verification, and IP design. Roadmaps and exciting technology updates will… Silvaco UseRs Global Event (SURGE) 2023 – Taiwan/Singapore

  • FPGA Frontrunner Meet & Greet

    Thales 350 Longwater Avenue, Reading, United Kingdom

    The FPGA Front Runners event will be hosted by Thales at their venue in Reading. The event will focus on “Security at System Level, and what security features we need in our FPGA to support this”. If you are interested in speaking at this event please email mike.bartley@techworks.org.uk Topics for talks: What is Security in FPGA-based… FPGA Frontrunner Meet & Greet

  • Silvaco UseRs Global Event (SURGE) 2023 – Japan

    Silvaco UseRs Global Events (SURGE) bring together users, developers, and industry experts of the EDA, IP, and TCAD communities to understand new semiconductor technologies, innovative applications, and techniques for realizing advanced designs. Presentations A variety of presentations will cover semiconductor device simulation, circuit design and verification, and IP design. Roadmaps and exciting technology updates will… Silvaco UseRs Global Event (SURGE) 2023 – Japan

  • Making the Right Connections – Taking the Guess Work out of DFT Connectivity Validation

    System-on-Chip (SoC) designs continue to grow in both size and complexity in order to meet the ever-growing performance and power demands associated with modern technology. To keep up with this fast-paced evolution, the corresponding design-for-test (DFT) logic required for manufacturing tests has also become more complex. Increasing transistor density, combined with a growing mix of… Making the Right Connections – Taking the Guess Work out of DFT Connectivity Validation

  • Auto-generation of Verification Infrastructure for IP to SoC

    Agenda (BST): Time Session Description Slides Videos 12.00 GMT Welcome and Introduction Mike Bartley,Tessolve 12.00 GMT Agnisys 12.30 GMT Imperas 12.45 GMT Breker 13.00 GMT   Close About DVClub The principal goal of each DVCLUB meeting is to have fun while helping build the European verification community through regular educational and networking events. Attendance at DVClub Europe… Auto-generation of Verification Infrastructure for IP to SoC

  • CMOS Circuit Techniques for Wireline Transmitters Part II

    Synopsys Webinar – Part II In this 3-part Synopsys webinar series, we will present how hyperscale data centers are going through a paradigm shift with the advent of technologies like Artificial Intelligence (AI) and edge compute requiring hyperscale data centers to support exponential growth of data volume.  This volume of network traffic demands an increase… CMOS Circuit Techniques for Wireline Transmitters Part II

  • Large Eddy CFD Simulation for Automotive Aerodynamics

    Wall-modeled large eddy simulations (WMLES) of complex vehicle geometries offer highly accurate results but can be challenging in terms of speed and cost. In this webinar, learn how to maximize the throughput of these simulations with Fidelity CharLES and how the solver’s GPU acceleration lowers the cost of using WMLES in engineering design. We will… Large Eddy CFD Simulation for Automotive Aerodynamics

  • Innovative Designs Enabled by Ansys Solutions – IDEAS 2023

    ANSYS’ VIRTUAL USER CONFERENCE FOR ELECTRONICS, SEMICONDUCTORS AND PHOTONICS DESIGNERS Join us for the IDEAS Digital Forum — a place to catch up on industry best practices and the latest semiconductor, electronic, and photonic design advances. IDEAS will explore future trends with keynotes from industry leaders and offer technical insights by expert chip designers from… Innovative Designs Enabled by Ansys Solutions – IDEAS 2023

  • Latest Innovations and Updates in ASICs with Efabless

    In this webinar Jeff DiCorpo & Matt Venn will delve into the latest ASIC developments, including the game-changing OpenFrame – a new Caravel version expanding your design possibilities by 50%. Topics Include: OpenFrame - a new version of Caravel that gives 50% more area GPIO configuration questions The new cocotb testing framework IPM - The… Latest Innovations and Updates in ASICs with Efabless

  • IEEE 30th International Conference on Electronics, Circuits and Systems (ICECS)

    Hilton Maslak Büyükdere Cd. No:233, Istanbul, Turkey

    The IEEE 30th International Conference on Electronics, Circuits and Systems (ICECS) will be held in Istanbul, Turkey 4-7 December 2023. As the flagship conference of IEEE Circuits and Systems Society in Region 8 (Europe, Middle East, and Africa), ICECS 2023 will consist of tutorials, plenary lectures, regular, special and poster sessions focusing on recent trends,… IEEE 30th International Conference on Electronics, Circuits and Systems (ICECS)

  • IP-SoC Conference 23 – Grenoble

    Hotel Europole 29 rue Pierre-Sémard, Grenoble, France

    A worldwide connected Event !! IP-SoC 2023 will be the 26th edition of the working conference fully dedicated to IP (Silicon Intellectual Property) and IP based electronic systems. The event is the annual opportunity for IP providers and IP consumers to share information about technology trends, innovative IP SoC products, Breaking IP/SoC News, Market evolution and… IP-SoC Conference 23 – Grenoble

  • Conformal User Group Conference 2023 and Technology Day

    Cadence Design Systems, Bldg 10 2655 Seeley Avenue, San Jose, CA, United States

    It’s time for our inaugural CadenceCONNECT: Conformal® User Group Conference and Technology Day held on December 5th at the Cadence San Jose campus. This interactive, in-depth technical conference connects designers, verification engineers, and engineering managers to share the latest design and verification practices based on Cadence’s Conformal family of solutions including logical equivalence checking (LEC), low power… Conformal User Group Conference 2023 and Technology Day