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IP-SoC Conference 23 – Grenoble

December 4, 2023 @ 9:00 am - December 5, 2023 @ 5:00 pm CET

IP-SoC 23 Grenoble

A worldwide connected Event !!

IP-SoC 2023 will be the 26th edition of the working conference fully dedicated to IP (Silicon Intellectual Property) and IP based electronic systems.

The event is the annual opportunity for IP providers and IP consumers to share information about technology trends, innovative IP SoC products, Breaking IP/SoC News, Market evolution and more.

The Grenoble event is a special event as it is also the annual IP Think Tank meeting where high level executives, market analyzer and technical experts from Foundry/technology, to new applications share their vision about the future of the IP concept. It will be the right time to analyze the fast evolution and consolidation in the IP market and IP business.

As far as the application domains are concerned it is important to give high to new application domains and take into account new system requirements such as 3D packaging, Security, Artificial Intelligence, Green Electronics, …

And over all you cannot miss The wine Tasting Party !!

Exhibition tables and “discussion panels” will favor vendor and customer meetings.

Any question? Please contact us

Registration and Exhibition installation opens at 7 am.

  • Day 1 – December 4th, 2023
9.00 am

Introduction Session

Welcome : Innovation in semi conductor industry

Gabrièle Saucier

Empowering Innovation in the Age of Custom Silicon

Eric Lalardie
Arm Ltd.

9.40 am


10.00 am

New technology the lead of innovation

Chairperson: Yves Quere – CEA
Greening the Road Ahead: Revolutionizing the Automotive Industry with FD SOI Technology

Philippe Flatresse
Product Marketing

Technologies enabling future mobile connectivity & sensing

Francois Brunier
Partnership Program Manager

Digital Beamforming design in mmW: A 22nm FDSOI transceiver practical case

Jérôme Prouvée
Layout Engineer & Project Manager

11.00 am


11.20 am

Artificial Intelligence IP and SoC

Chairperson: Costas Conistis – Alphawave Semi
Meeting the Needs of AI Training with HBM3

Philip Van Den Heuvel
Regional Sales Manager
Rambus, Inc.

Innovative Integrated IP SoC Design for Edge AI

Tim Menasveta
Director of IoT Product Management
Arm Ltd.

Transforming Far-Edge Computer Vision with Energy-Efficient A

Vincent Huard
Chief Technology Officer
Dolphin Design

12.30 pm


1.30 pm

New Challenges

Chairperson: Eric Lalardie – Arm
The Lossless Compression Challenge: from Networking to Data centers

Dr. Calliope-Louisa Sotiropoulou
Sales Engineer
CAST, Inc.

Addressing connectivity scalability in the AI world with Mulit-Standard IO Chiplets driving next generation interconnects

Michael Klempa
Product Marking Specialist
Alphawave Semi

2.10 pm


2.30 pm

Safety Critical Applications

Chairperson: Dr. Calliope-Louisa Sotiropoulou – CAST
IP Core Considerations for Ensuring Functional Safety in Safety-Critical Applications

Philipp Jacobsohn
Senior Staff Applications Engineer
SmartDV Technologies

GRLIB: VHDL IP library for fault-tolerant SoC

Fabio Malatesta
Product Marketing Engineer
Frontgrade Gaisler

3.10 pm

Automotive Applications

CAN XL – can safety go in hand with performance?

Jacek Hanke
Digital Core Design

Solve the Latest ISO 21434 Cybersecurity Challenge with an Automotive HSM

Ruud Derwig
Senior Staff Engineer for Security IP
Synopsys, Inc.

4.00 pm


4.20 pm

Security Solutions

Chairperson: Bart Stevens – Rambus, Inc.
Which IP for Which Security Certification Standard,

Ludovic Merrien
Security Certification Leader
Tiempo Secure

LDPC Encoder/Decoder

Manish Mahajan
Secantec, Inc.

Security from chip to cloud with PQC (Post-Quantum Cryptography)

Brice Gaignoux
EMEA Pre-Sales Engineer

5.20 pm


5.40 pm

Security Solutions – 2

Chairperson: Ruud Derwig – Synopsys, Inc.
Quantum Safe Cryptography: Protecting Devices and Data in the Quantum Era

Bart Stevens
Senior Director of Product Marketing
Rambus, Inc.

How will platform and communication security evolve in the quantum computing era?

Graeme Hickey
VP Engineering

The Power of Physical Unclonable Functions (PUFs)

Chris Jones
Director, Field Application
Crypto Quantique

7.00 pm

You should not miss !

Wine tasting party sponsored by Soitec
8.00 pm

Banquet sponsored by D&R

  • Day 2 – December 5th, 2023
9.00 am

Processor IP

Chairperson: Philippe Quinio – STMicroelectronics
Beyond one-size-fits-all: The power of tailored CPUs

Mike Eftimakis
VP Strategy & Ecosystem
Codasip GmbH

Survey of market available processor IP

Dagmara Zielinska
Partnership Program Manager
D&Rwith Gabrièle Saucier

9.40 – 11.00 am

From Processor IP to Processor or supercomputer chip: 

What is needed and what is the next success track ?

This panel gives an opportunity to exchange some vision about the future of processor IP up to extension to processor / multiprocessor chip.

With the participation of:

  • Fabio Malatesta – Product Marketing Engineer – Frontgrade Gaisler
  • Mike Eftimakis – VP Strategy and Ecosystem – Codasip GmbH
  • Loic Lietar – Co-Founder & CEO – GreenWaves Technologies
  • Thierry Lelégard – Head of Platform Security – SiPearl
11.00 am


11.30 am

Analog IP

Chairperson: Philippe Flatresse – SOITEC
Adaptive Voltage Scaling (AVS): Enhancing Chip Efficiency

Vincent Telandro
Product Marketing manager (Power Management IP)
Dolphin Design

Technology Analysis: what you need to know before embarking on analog design migration

Jean-François Lambert
Director of Business Development

12.15 pm


1.20 pm

Design Platform

Chairperson: Philippe Flatresse – SOITEC
Hybrid Cloud Management for IP Development

Sundar M
Tessolve Semiconductor Private Limitedwith Pitchumani Guruswamy
Tessolve Semiconductor Private Limited

Online Only
A novel approach for SoC design resource management and prediction

Chouki Aktouf
Innova Advanced Technologies

Multi-IO co-processor with TSN

Vincent Laporte

2.10 pm


2.30 pm

Verification Platform

Chairperson: Patrick Blouet
IP QA Best Practices

Lionel Couder
Sr. Applications Engineer
Siemens Digital Industries Software

Important Considerations for Verification of CXL Devices

Nicolas Dai
Application Engineer Architect
Cadence Design Systems, Inc.

3.10 pm

Monitoring Platform

Chip Condition Monitoring and Performance Optimization. Process/Voltage/Temperature Detectors in ASIC Design Methodology.

Vsevolod Sergeenko
RFID Team Leader

The Critical Role of Embedded Monitor IP in Enabling Silicon Lifecycle Management Use Cases

Dan Alexandrescu
R&D Engineer
Synopsys, Inc.

4.00 pm

Give Away – Event Closure


Hotel Europole
29 rue Pierre-Sémard
Grenoble, France
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