Formality
An Efficient Method to Perform Functional ECO Using Formality ECO
During complex IP development, effort and time taken to perform a functional ECO is very high. It involves analysis and understanding of huge combinational and sequential blocks, and usually runs into multiple iterations if done manually. For example: the physical netlist multibit register mapping could be different and Synopsys IC Compiler II would not be… Read More »An Efficient Method to Perform Functional ECO Using Formality ECO
5X Faster Equivalence Checking with Formality ML-driven DPX
Synopsys’ Fusion Compiler provides a broad spectrum of aggressive optimization techniques such as retiming, multibit banking and advanced data-path optimization that our designers want to take advantage of to achieve maximum PPA. Our expectation from production quality Equivalence checking is to be able to complete verification with minimal efforts and the fastest turn-around-time. This presentation… Read More »5X Faster Equivalence Checking with Formality ML-driven DPX
Fast and Accurate Functional ECOs with Synopsys Formality ECO
To achieve maximal quality of results (QoR) in synthesis, it requires leveraging retiming, multibit banking, and advanced datapath optimizations, which are part of the Synopsys Fusion Compiler™ implementation solution. However, during the late-stage functional ECO (engineering change order) phase, the automated ECO tool needs to be sophisticated enough to generate optimal patches in the presence… Read More »Fast and Accurate Functional ECOs with Synopsys Formality ECO