RDC
Pre-empt Late-stage Low Power Issues using Predictive Analysis
Low power is an increasingly critical requirement for all modern SoCs. Moreover, it is becoming more and more difficult with complex architectures being used in modern designs. This has made it necessary for designers to invest heavily in this verification effort throughout the design development cycle starting from architecture definition, RTL development, to final netlist tape-out. Conventionally, static low power flow constitutes defining and cleaning… Read More »Pre-empt Late-stage Low Power Issues using Predictive Analysis
Constraints-Driven CDC and RDC Verification Including UPF Aware Analysis
Today’s million gates integrated circuits (ICs) involve various intellectual properties (IPs) interfacing with each other through multiple asynchronous clock and reset domains. Ensuring all clocks propagate concurrently across each clock tree components used as clock switching elements or each sequential or combinatorial component, clock output of which becomes asynchronous with respect to the clock input… Read More »Constraints-Driven CDC and RDC Verification Including UPF Aware Analysis
Comprehensive Static Verification for FPGA and ASIC RTL Designers
As designs get increasingly complex, design teams are looking to find bugs earlier, to reduce rework and shorten time-to-market. The ultimate “shift left” is to put easy-to-use static verification in the hands of RTL designers to eliminate bugs at their source. This webinar covers comprehensive static verification capabilities in the Cadence® Jasper™ Superlint and CDC apps for… Read More »Comprehensive Static Verification for FPGA and ASIC RTL Designers
New Advanced Techniques for Reset Domain Crossing (RDC) Analysis
Designers increasingly use complex reset signaling architectures to meet high-performance, low-latency, and low-power requirements. Specifically, independent reset domains are created by complex reset sequences, reset circuitry, and the intermixing of IPs with different reset schemas, power-management domains, and security domains or functionality. This increase in reset signaling complexity is creating new RDC verification challenges that… Read More »New Advanced Techniques for Reset Domain Crossing (RDC) Analysis