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RISC-V

Accelerating AI Applications Using Custom RISC-V based SIMD/VLIW DSPs

The revolution in AI triggers an increased awareness for application-specific instruction-set processors (ASIPs). These processors implement a specialized instruction-set architecture (ISA) tailored to the AI application domain, often starting from a baseline such as the RISC-V ISA.  ASIPs can replace traditional fixed-function hardware accelerators, thereby introducing software-programmability in the AI acceleration domain, and thus more… Read More »Accelerating AI Applications Using Custom RISC-V based SIMD/VLIW DSPs

Verification Futures Conference 2024 Austin

Austin Marriott South 4415 South Interstate 35 Frontage Road, Austin, TX, United States

The Verification Futures conference provides a unique blend of conference presentations, exhibitions, training and industry networking sessions dedicated to discussing the challenges faced in hardware and software verification. Verification Futures provides a unique opportunity for end-users to define their current and future verification challenges and collaborate with the vendors to create solutions. It also provides… Read More »Verification Futures Conference 2024 Austin