RISC-V
Optimizing Chiplet architectures of RISC-V clusters, GPU and DNN using System-Level IP
Multi-die SoC containing multiple RISC-V clusters, GPU, NPU, accelerators and DNN have considerable benefits for applications in automotive, space and industrial. Architecture exploration of the chiplet-based SoC requires multiple interconnect protocol models, and multiple coherent and non-coherent compute resources. This Webinar will demonstrate a methodology for rapid modeling and architecture trade-off using UCIe in modeling… Optimizing Chiplet architectures of RISC-V clusters, GPU and DNN using System-Level IP
Accelerating AI Applications Using Custom RISC-V based SIMD/VLIW DSPs
The revolution in AI triggers an increased awareness for application-specific instruction-set processors (ASIPs). These processors implement a specialized instruction-set architecture (ISA) tailored to the AI application domain, often starting from a baseline such as the RISC-V ISA. ASIPs can replace traditional fixed-function hardware accelerators, thereby introducing software-programmability in the AI acceleration domain, and thus more… Accelerating AI Applications Using Custom RISC-V based SIMD/VLIW DSPs
Addressing Real-Time Workloads in Automotive Applications with Efficient ARC-V Processors
Many automotive applications require processing workloads with minimum latency and precise timing budgets. This is especially true for safety-critical applications like adaptive cruise control and anti-lock braking, where human life may be jeopardized. These systems require processing elements that can respond to events within specific (predictable) time constraints. System reliability and availability depend on the… Addressing Real-Time Workloads in Automotive Applications with Efficient ARC-V Processors
2024 ANDES RISC-V CON
The DoubleTree by Hilton 2050 Gateway Place, San Jose, CA, United StatesRecently, RISC-V, with its open, streamlined, and scalable configuration, has become the mainstream solution adopted by leading market players, paving the way for widespread technological innovation. In the RISC-V application field, there has been rapid development in forward-looking areas such as automotive electronics and AI. The development application processors has attracted a lot of attention,… 2024 ANDES RISC-V CON
Open-source silicon and EDA workshop 2024
Sorbonne Université 15-21 Rue de l'École de Médecine, Paris, FranceThe chip design ecosystem in Europe is challenged by expensive development tools, legal constraints, lock-in threats and dependency on external supply chains. Open-source Electronic Design Automation (EDA) tools and open-source silicon chips are emerging as possible solutions to these problems. It is increasingly recognised that open-source development offers not only faster and cheaper development but… Open-source silicon and EDA workshop 2024
Hot Chips 2024
Memorial Auditorium 551 Jane Stanford Way, Stanford, CA, United StatesHot Chips 2024 will be held as a hybrid conference with in-person attendance at Memorial Auditorium, Stanford University from August 25 to 27, 2024. Conference Format Hot Chips 2024 is a hybrid conference. You may register to attend Virtually or In-Person. The In-Person conference is held at Memorial Auditorium, Stanford University. Tutorials: Sunday, August 25… Hot Chips 2024
Synopsys Processor IP Summit 2024: RISC-V, DSP and NPU IP for Your Diverse SoC Processing Needs
Santa Clara Marriott 2700 Mission College Blvd, Santa Clara, CA, United StatesAs electronic systems continue to become more complex and integrate greater functionality, SoC developers are faced with the challenge of developing more powerful, yet more energy-efficient devices. The processors used in these applications must be efficient to deliver high levels of performance within limited power and silicon area budgets. Why Attend? Join us for… Synopsys Processor IP Summit 2024: RISC-V, DSP and NPU IP for Your Diverse SoC Processing Needs
Verification Futures Conference 2024 Austin
Austin Marriott South 4415 South Interstate 35 Frontage Road, Austin, TX, United StatesThe Verification Futures conference provides a unique blend of conference presentations, exhibitions, training and industry networking sessions dedicated to discussing the challenges faced in hardware and software verification. Verification Futures provides a unique opportunity for end-users to define their current and future verification challenges and collaborate with the vendors to create solutions. It also provides… Verification Futures Conference 2024 Austin
ORConf 2024
Gothenburg Gothenburg, SwedenOur 10th ORConf! The FOSSi Foundation is proud to announce the 10th installment of ORConf, a conference dedicated to free and open source silicon to be held over the weekend of Friday September 13 to Sunday September 15 in Gothenburg, Sweden. ORConf is a weekend of presentations and networking for the open source silicon community.… ORConf 2024
VC Formal Special Interest Group
Santa Clara Marriott 2700 Mission College Blvd, Santa Clara, CA, United StatesRegister for the Synopsys VC Formal Special Interest Group (SIG) event today. This event provides an opportunity for users, managers, and enthusiasts to stay connected with the latest formal verification innovations, techniques and methodologies. Industry leaders such as Amazon, Black Sesame, Microsoft, NVIDIA, Samsung, and Untether AI will share their experiences with the latest formal… VC Formal Special Interest Group
RISC-V Summit – North America 2024
Santa Clara Convention Center 5001 Great America Parkway, Santa Clara, CA, United StatesRISC-V is defining the future of open computing by providing unprecedented freedom to innovate. More than 13 billion RISC-V cores have shipped, powering new innovations in AI/ML, wireless, automotive. data center, space, IoT, embedded and more. Each day, thousands of engineers around the world collaborate and contribute to advance RISC-V. The RISC-V community shares the… RISC-V Summit – North America 2024
ASIP University Day 2024: Domain-Specific Processor Design using ASIP Designer
The AI revolution and other application domains, like data centers, advanced wireless communications, image and video processing, automated driving assistance, and post-quantum cryptography need more powerful architectures with higher performance. This is driving demand for heterogeneous multicore systems including application specific instruction set processors (ASIPs). ASIPs have become a mainstream implementation option for modern SoCs,… ASIP University Day 2024: Domain-Specific Processor Design using ASIP Designer