Xcelium
Cadence TECHTALK: Mixed-Signal SoC Verification Simplified with Xcelium Simulator (NA)
Analog and mixed-signal verification has always been a challenge for design and verification engineers. It has become tedious with the increasing complexity of SoC designs. Join this webinar to learn how Cadence is providing effective verification and debug methodologies using RNM of analog blocks for mixed-signal SoC verification.
Xcelium ML for 5X Faster Regression Throughput
Overview Regressions time often becomes one of the biggest challenges to meet the tight project schedule with increasing complexity of the SoC designs and shorter time to market. Verification engineers apply a coverage-driven methodology and run a large number of constrained random tests with multiple seeds in massive regressions to meet their coverage goals. Thus,… Read More »Xcelium ML for 5X Faster Regression Throughput
Mixed-Signal SoC Verification Simplified with Xcelium Simulator
Analog and mixed-signal verification has always been a challenge for design and verification engineers. It has become tedious with the increasing complexity of SoC designs. Because the analog behavior of key design blocks cannot be simulated effectively using traditional verification methodologies, new methodologies and solutions like real number modeling (RNM) for analog functional blocks are… Read More »Mixed-Signal SoC Verification Simplified with Xcelium Simulator
Xcelium Apps: Everything You Need in the Simulation Metaverse
Register for this CadenceTECHTALK if you are looking for an end-to-end solution for all your verification requirements in automotive, mobile, and hyperscale designs. This CadenceTECHTALK introduces Xcelium Apps, a portfolio of domain-specific technologies implemented natively on the Cadence Xcelium Logic Simulator. The Xcelium Apps are a paradigm shift in the way verification is being done,… Read More »Xcelium Apps: Everything You Need in the Simulation Metaverse
Best Practices to Achieve the Highest Performance using Xcelium Logic Simulator
Simulator performance is critical owing to the exponentially increasing complexity of SoC designs and shrinking market time. Cadence® Xcelium™ is a leader in simulation performance, and we focus relentlessly on improving the core performance of the simulator. We keep developing new performance optimizations that are delivered with each new release of Xcelium. It is easy to achieve… Read More »Best Practices to Achieve the Highest Performance using Xcelium Logic Simulator
Low-Power Verification Using Xcelium Simulation
Don’t let power-related issues that appear late in the verification cycle impact your project schedule. Register for a webinar that shows you how to catch low-power issues early on. The Cadence low-power solution considers power at every step of the design flow, from architecture to functional verification, analysis, implementation, and signoff. This webinar will focus… Read More »Low-Power Verification Using Xcelium Simulation