Moderators: Ankur Srivastava (U. of Maryland) and Swarup Bhunia (U. of Florida) Panelists: – Mike Borza, Synopsys – Brian Night, Microsoft – Pompei Len Orlando, Air Force Research Lab (AFRL) – Antonio de la Serna,… CAD for Assurance: Panel 5: Hardware Assurance vs. AI: Friend or Foe?
With the formal release of the HBM3 specification, memory bandwidth for AI/ML and HPC shifts to a higher gear. Terabytes of bandwidth are possible using HBM3’s 2.5D/3D architecture. Join memory expert Frank Ferro as he… Memory Bandwidth Races Higher with HBM3
Join Achronix for a live Webinar December 16th: 10-11 AM Pacific and Recorded On-Demand After the Event AI/ML hardware faces three common pain points: memory bandwidth, computational throughput and on-chip data movement. Next-generation FPGA technology… How to Overcome the Pain Points of AI/ML Hardware Design
