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FinFET

Cadence, May 12, 2022

Tackling Advanced Analog FinFET Back-End Design Challenges

The layout implementation of analog circuits in advanced FinFET technologies is becoming increasingly complex and challenging, with many new design rules to consider and multi-patterning,… Read More »Tackling Advanced Analog FinFET Back-End Design Challenges

Cadence, May 5, 2022

Tackling Advanced Analog FinFET Front-End Design Challenges with Better Methodologies

Analog engineers adopting advanced FinFET technologies face many challenges that were not present when using planar transistors. Challenges in layout implementation have a direct impact… Read More »Tackling Advanced Analog FinFET Front-End Design Challenges with Better Methodologies

Silvaco, February 10, 2022

Managing the Complexity of FinFET Standard Cell Layout with Cello

FinFET technologies have enabled designs with increased density and performance while reducing power, when compared to MOSFET. However, this comes at a cost of increased… Read More »Managing the Complexity of FinFET Standard Cell Layout with Cello

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