The FPGAworld Conference is an international forum for researchers, engineers, teachers, students, and hackers. It covers topics such as complex analog/digital/software FPGA SoC systems, FPGA/ASIC-based… Read More »FPGA World 2022 – Stockholm
FPGAs have made a regular evolutional leap forward in terms of new approaches and solutions for both hardware- and software developers. The FPGA Conference Europe,… Read More »FPGA-Conference Europe
OSVVM has grown tremendously over the last couple of years. This period saw simulator independent scripting, test reporting, model independent transactions, virtual transaction interfaces, and… Read More »Advances in OSVVM’s Verification Data Structures
According to the 2020 Wilson Verification Survey FPGA verification engineers spend 46% of their time debugging. As a result, we need good scripting to simplify… Read More »OSVVM’s Test Reports and Simulator Independent Scripting
Some methodologies (or frameworks) are so complex that you need a script to create the initial starting point for writing verification components, test cases, and/or… Read More »Better FPGA Verification with VHDL – Faster than “Lite” Verification Component Development with OSVVM
The FPGAworld Conference is an international forum for researchers, engineers, teachers, students, and hackers. It covers topics such as complex analog/digital/software FPGA SoC systems, FPGA/ASIC-based… Read More »FPGA World 2022 – Copenhagen
The Xilinx Versal ACAP platform is multi-featured, offering unprecedented system level performance and integration. This informative workshop (delivered in 2 half day sessions) is a… Read More »Versal ACAP Workshop Online
Functional coverage is often mentioned together with constrained-random verification, and this is a great combination. However, functional coverage is also very useful even if you… Read More »FPGA Design/Verification: Code, Functional and Specification Coverage
Randomization is very important for modern verification. Still, very few designers apply randomization sufficiently in their testbenches. This means they are missing out on a… Read More »FPGA Design/Verification: Randomization
Presenter: Espen Tallaksen, CEO of EmLogic Thursday, May 5, 2022 Abstract: For most FPGA projects, over 50% of the overall project time is spent on… Read More »FPGA Verification Architecture Optimization with UVVM