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Doulos, June 23, 2023

Dealing with Complexity in Formal through Abstraction and Reduction

In the world of formal verification, abstractions along with design reductions, help reduce the state space and make it easier for formal to converge on its proofs. In this webinar Doulos Senior Member Technical Staff,… Dealing with Complexity in Formal through Abstraction and Reduction

Synopsys, June 21, 2023

Achieve Out-of-the-Box Equivalence Checking with Synopsys Formality ML-driven Distributed Processing

When designers synthesize chip designs with aggressive PPA targets, the expectation and goal is to be able to complete verification with minimal effort and a fast turn-around-time. Synopsys Design Compiler and Fusion Compiler offer a… Achieve Out-of-the-Box Equivalence Checking with Synopsys Formality ML-driven Distributed Processing

Synopsys, June 20, 2023

Leveraging Silicon Lifecycle Management (SLM) for Automotive Applications

Automobiles are today’s supercomputers and with that statement comes great challenges. A vehicle is a highly demanding environment for electronics. Temperature and humidity extremes, noise and vibration, electrical interference, exposure to alpha particles, and other… Leveraging Silicon Lifecycle Management (SLM) for Automotive Applications

PCI-SIG

PCI-SIG Developers Conference 2023

The PCI-SIG Developers Conference 2023 is returning to Santa Clara on June 13-14, 2023! Members of the PCI-SIG community including systems architects, designers, engineers, and engineering managers agree that this is an event you won’t want… PCI-SIG Developers Conference 2023

Synopsys+SAE, June 14, 2023

Microelectronics Design Security: Better with Formal Methods

Whether you are developing Systems-on-Chip (SoCs) for mobile and wearables, automotive, aerospace, defense, data centers, or entertainment, securing your proprietary data and customers’ information is critical to your company’s long-term success. Hackers can exploit vulnerabilities… Microelectronics Design Security: Better with Formal Methods

Synopsys, June 14, 2023

Verify Your SoC Design Efficiently from Planning to Coverage Closure using Synopsys Verification Family

Verifying an SoC is an extremely complex process that requires agile turnaround, constant control feedback, and flexibility to adapt to evolving project needs. Coverage is an efficient metric for the number of potential bugs found… Verify Your SoC Design Efficiently from Planning to Coverage Closure using Synopsys Verification Family

Synopsys, June 1, 2023

Accelerate Software Innovation Through Target-Optimized Code Generation and Virtual Prototypes

Increasingly complex automotive systems are driving the need for new and powerful E/E architectures, and new technology is emerging that offers a significant computational increase compared to previous generation SoCs. To deliver next-generation, differentiated software… Accelerate Software Innovation Through Target-Optimized Code Generation and Virtual Prototypes