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Verify Your SoC Design Efficiently from Planning to Coverage Closure using Synopsys Verification Family

June 14, 2023 @ 10:00 am - 11:00 am CEST

Synopsys, June 14, 2023

Verifying an SoC is an extremely complex process that requires agile turnaround, constant control feedback, and flexibility to adapt to evolving project needs. Coverage is an efficient metric for the number of potential bugs found and needs to be tracked at each stage of the project. The verification process starts from defining the verification goals, automating test execution, collecting and analyzing coverage metrics, and then tracking and providing guidance until coverage closure is reached. In this webcast, we will describe how to easily achieve this process using the Synopsys Verification Family of tools including VCSVerdi, and VC Execution Manager.


Listed below is the industry leader scheduled to speak.

xavier mathes headshots

Xavier Mathes

Senior Staff Application Engineer

Xavier Mathes is a Senior Staff Application Engineer at Synopsys. He is responsible for multiple verification products including Synopsys VCS, Verdi, Verification IP, VC Execution Manager, HAPS, and Synplify. Xavier previously worked at IBM, Philips Semiconductor, Synplicity, and other semiconductor companies. His combined 26 years working in the industry has brought a wealth of knowledge and experience in the areas of semiconductor design and verification. Xavier has a Masters of Science in Electrical Engineer from CentraleSupelec.


June 14, 2023
10:00 am - 11:00 am CEST
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