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Synopsys, July 27, 2022

AI-Driven Verification: Saving Time with Verdi Regression Debug Automation

Analyzing the thousands of failures from daily regression runs is a manual, tedious, and error-prone process. The process can significantly impact quality-of-results, time-to-results and cost-of-results. The Synopsys Verdi® Regression Debug Automation (RDA) is an artificial… 

Synopsys, June 29, 2022

Optimizing Fault Simulations with Formal Analysis to Achieve ASIL Compliance for Automotive Designs

Most safety critical SoCs, such as those developed for automotive driver aid systems, require ASIL-D compliance. ASIL-D is the highest grade in the ISO 26262 Standard’s risk classification system, required less than 1% Single Point… 

Synopsys, June 23, 2022

Constraints-Driven CDC and RDC Verification Including UPF Aware Analysis

Today’s million gates integrated circuits (ICs) involve various intellectual properties (IPs) interfacing with each other through multiple asynchronous clock and reset domains. Ensuring all clocks propagate concurrently across each clock tree components used as clock… 

SAE Media Group, June 22, 2022

Simplify & Streamline Development of ISO 26262 Compliant Automotive SoCs

Standards such as ISO 26262 define strict requirements, processes, and methods that all stakeholders – IP vendors, sub-system developers, and semiconductor SoC and system developers – must abide by when designing safety-critical automotive products. One… 

Functional Verification to Fault Simulation: Considerations and Efficient Bring-Up

Electronic systems in automobiles are growing rapidly in size, complexity, and critical functionality. As a result, functional safety verification is emerging as an essential requirement for automotive SoC and IP designs. In order to assure…