Electronic systems in automobiles are growing rapidly in size, complexity, and critical functionality. As a result, functional safety verification is emerging as an essential requirement for automotive SoC and IP designs. In order to assure that even the most stringent safety standards are met at a faster pace, comprehensive and fast fault injection and simulation solutions that adhere to the strict set of safety standards as outlined by ISO 26262 and IEC 61508 are required.
In this Synopsys webinar, I will discuss some of the challenges users face when extending their verification from targets functional simulation to fault simulation. I’ll discuss best practices for efficiently bringing up a design in VC Z01X for digital fault simulation including strategies for setting up and simulating the design, moving abstraction from RTL to gate level simulation and improving coverage results. I will also provide some insight into efficient test selection and ways to optimize your design setup for fault simulation.