3D glasses to lighten us up

TSMC and ST presenters

Winner of 10th annual Tensing Norgay Interoperability Award: IEEE ISTO

For the past several years I’ve seen TSMC create the iPDK standard and seen modest adoption, then along comes Si2 with OpenPDK. Are iPDK and OpenPDK complimentary, competitive, or what?

The ST speaker says complimentary, however when I talk with some CAD managers and EDA execs the two standards sound conflicting and over-lapping.


Vincent Varo (ST) – Design Kit Manager, Central CAD. Open PDK board member.

ST’s Vision on OpenPDK and iPDK concepts.

Goals – to produce openness and industry standard formats, be more efficient.

Single PDK to support and EDA vendor tool.

iPDK and OpenPDK are complementary approaches.

Adoption requires: collaboration between EDA, foundry, users

Need advanced technologies: 28nm, 20nm

Best in class tools mixed together that need standards.


OpenPDK: Foundries, EDA Vendors, Customers, PDK Development Team

Inputs: eDRM, eDevice spec, eModels.

Ouptuts: DRC, LVS, Tools, Libs, PEX, Spice models

iPDK: iDRC, iLVS, Tools, iLib, iPEX, Spice models

The iDeck can be interpreted by an CAD tool itself

Interoperable device library (normalized OA symbol, layout pcell generators,…)

An iPDK can be made of an OpenPDK standardized spec and recommendation.

OpenPDK from a CAD vendor viewpoint: input (eDRM, eDevice spec, eModels) -> Automatic development tools, OpenPDK, automatic validation tools, validation report.

Foundry view of OpenPDK – they create the normalized and standardized e Design Manual, e Device Spec

ST will support both OpenPDK and iPDK. Use OA as universal data storage. Not vendor specific, not foundry specific.

Priorities – eDRM definition as a reference, PDK input standardization for best in class automation flow. Make 28nm and 20nm iPDK and OpenPDK.

S.T. Juang (TSMC) – Sr Director, Design Infrastucture Marketing

TSMC Open Innovation Platform (OIP) – collaboration between, EDA, IP, services.

iPDK, iRCX, iDRC, iLVS, iPRT, iSNA, iSDK/TMI, unified DFM engine, unified IP specs

Design kit innovation –

AMS Reference flow: 28nm, 20nm

DFM Implementation flow: 40nm, 28nm

iPDK contents – SPICE, LVS, views, symbols

Tech Files Roadmap – iPDK, iRCS, iDRC, iLVS (65nm to 28nm)

Partners in each area (EDA Vendors)

Analog Base Cell (ABC) – scalaeable analog cells with optimized layout, Pycell and OA symbol, multi-vendor design flow with ABC

Analog/Mixed signal reference flow – goals

AMS Reference Flow 1.0 – used a 1.6GHz PLL