Mephisto and Analog Design Automation

posted in: Chip Design Mag | 0
Mephisto Kenneth Francken, CEO at Mephisto explained how his tools will help make analog designers more efficient by helping them to do analog IP verification, IP migration and IP creation. This Belgium-based start-up kind of competes with what the Neolinear tools at Cadence provide but then adds a more sophisticated test bench composer and automated documentation capabilities.Virtuoso users will enjoy the integration that Mephisto gives them and familiar look and feel. Embedded Python scripting allows you to control things like optimization runs.

The example I saw involved a system-level optimization of a PLL design. Results showed up as a trade-off curve between total power versus integrated noise.

The methodology to using Mephisto tools involves a 5 step process:

1) Capture design intent, specs, conditions, etc.

2) Compute circuit performance, multi-variable sweeps, control simulations, define types of analysis, sizing, optimization.

3) Analyze results and optimization effects, generate trade-off curves and charts with M-Explore

4) Document analog IP creation and re-use fully automatically using template-based documentation

5) Re-use IP by changing specs, migrate to new nodes, re-verification, optimization

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