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Silicon Frontline: F3D – Fast 3D Extraction for IC Designs

Dermott Lynch

Who
Dermott Lynch, VP of Sales and Marketing

Dermott Lynch

Overview

May of 2009 introduced Silicon Frontline as a full-chip 3D extraction company, more accurate than pattern-based extraction tools.

Notes

News – TSMC has adopted Silicon Frontline in their AMS 1.0 reference flow for high precision analog (only field solver included).

UMC – uses Silicon Frontline to generate reference data (they still have QuickCAP in use).

8 of 25 top semiconductor vendors are using, with some 20 customers now, over 300 designs verified now.

Process nodes are – 28nm, 40nm, 45nm, 180nm.

Designs – ADC designs requiring highest accuracy, image sensors, differential signals.

Limits – Adoption rate to new ideas.

Evaluations – Typically 5 to 6 month period. Accuracy claims compared versus Raphael or QuickCAP results then simulate an ADC design versus silicon results.

Competition

Calibre has xACT 3D (a mesh-based field solver) – you cannot predict the level of accuracy that you will get. Our technique called random walk lets you define the percentage accuracy required. Denser meshes explodes RAM usage and slows down calculations. Where are all the Mentor customers for this tool in the past 18 months? Mesh based approach requires extra care for dielectric modeling.

Random walk – what about outlier results? We can prove our accuracy results by our technique.

Physware – different market focused on package, and board/package.

Synopsys NXT – another random walk 3D field solver (acquired from an Indian company), where is the customer list?

Learning curve – Half a day to install, learn and get results. Expert level in a few weeks.

Typical users – ADC designers who demand utmost accuracy.

Employees – up 50% and continuing to grow, business looks good.

Q: How do you work with multi-core and multi-cpu?

A: Our algorithm ultilizes multi-core and multi-cpu. Max number used so far is 16 cores

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