I met with Pat Drennan – CTO on Tuesday to learn more about Solido Design Automation. Pat is an ex Motorola/Freescale guy who really likes statistics and silicon device physics.
For years now the foundries provided models for Monte Carlo analysis however full Monte Carlo runs just take too much circuit simulation time to be practical for designs with over 1,000 MOS devices.
Pat sees a challenge in finding one person with all three areas of expertise: circuit design, device physics and statistic. He also sees an opportunity to take better advantage of models.
Martin Harding – VP Worldwide Sales and Marketing joined us in the conversation. I first met Martin in the 90’s when he was at Chronologic and selling the very popular VCS compiled-Verilog simulator. Viewlogic acquired that company and abused the people, so they left.
The founders of Solido first founded ADA and sold that company to SNPS as an optimizer, now Solido is focused on the statistics side.
True Corners are based on Monte Carlo info. You can miss local versus global variations if you’re not careful.
Solido is working with both foundries and design houses to help create the needed accuracy.
At the TSMC keynote it was noted that a three party relationship is needed: EDA, designer, foundry. This is a big challenge.
Solido tools handle lots of parameters for local and global process variations.
Back at Motorola there was a culture of six sigma focus, quality, statistics. Internal statistical tools since the 80’s, and older methods work on circuits up to 100 devices. How do you analyze and optimizae a 200 transistor circuit?
The focus at Solido now is on a designer interactive tool, not an optimizer, integrated into the Cadence environment with a consistency db using OA.
Kristopher Breen, Corporate AE showed how the Solido tool uses faster IPC channels to communicate with Virtuoso.
Variation Designer is their software platform with plugin tools and it reads in SPICE models and netlists. It launches circuit simulators (across a cluster) and provides superb visualization results:
Prices starting at $10K.
The recommended tool flow is:
1- analyze(discover true corners – global and local variations)
2- identify (seep design, find sens analyze mismatch), cause of failure, performance improvement
3- fix (failures, prefor, reduce power, reduce area, verify, (run corners, run mc, verify high-sigma design)
Tight integration with Cadence ADE (Virtuoso), solido is just a pull down menu for Variation Designer.
With Discover True Corners
– Plots of things like Phase Margin (spec, actual), find a subset of corners to cover my design, global variations like Tox, local variations per device Vth, 8 model parameters per device as an example.
– Interactive way to create corners specific to design, technology, etc.
– Impact of design variables (per MOS device and parameter) highlights on cadence schematic (like sensitivity analysis), uses my true corners and my sources of global/local variations, how sensitive is my spec to changes in L? with fewer sims I get quantitative feedback on how to change my design
– Sweep design variables (inside of variation designer)
– Make schematic changes in Virtuoso (change a W), rerun corners, each new run shows up as new column,
– Find sensitive devices (more efficient than traditional sens analysis)
– Analyze mismatch, you select which subset of devices need variation
– Run MC (flexible, traditional analysis, verification mode, run at the end step)
– Verify high sigma design (calculate yield of a design with fewer simulation runs, by shifting to tail of distributions)
As for Solido clients – two foundries are now engaged, and fabless clients so stay tuned for future press releases which mention names.
