What is Cadence R&D Up To?

posted in: Chip Design Mag | 5

Have you ever wondered what an EDA company is thinking about building or actually doing in R&D?

I’ll have a chance to speak with either Chi-Ping Hsu, Senior Vice President of Research and Development for the Implementation Products Group or Nimish Modi, Senior Vice President of Research and Development for the Front End Group.

I’m rather curious about the mindset of buy versus build in their roadmap. When Fister took over Cadence it sounded like they only wanted internal development. Now they can reset expectations and set a new course.

Let me know what kind of questions you would like to ask of Cadence R&D and I’ll bring it up during our briefing.

5 Responses

  1. Sean Murphy

    1. Why isn’t Cadence R&D working with Verific to certify their System Verilog interoperability. Synopsys and Mentor take part. See http://www.edn.com/blog/920000692/post/1140045114.html (especially the comments).

    2. More generally shouldn’t you be expanding your Connections program to partner with other niche suppliers to provide complete solutions?

    3. Christoph Hammerschmidt interviewed Lip Bu Tan at CDN Live in Munich recently (see
    http://www.eetimes.com/showArticle.jhtml?articleID=217701842 and asked “Cadence has lost its long-term position as the market leader in the EDA software market. Is Cadence falling back in terms of innovation and product quality?”

    Lip Bu Tan’s answer to the market share aspect of the question was reported by EET as:

    “In terms of market share, after having conducted extensive talks to our customers, I don’t think we have lost much market share so far. I think we have to re-classify our revenue recognition. We went to a 90/10 three-year rateable model [with regard to our accounting method] and so far I think we hold on to what we have in terms of market share. It is very hard to tell who has the strongest market share…one year we are ahead of our competitors and then in certain years they are ahead. For this reason, I think it very hard to classify the market-share shift.”

    Doesn’t a 36-39% drop in revenue over 12-15 months indicate some significant market share loss, at least in certain segments? Would it make sense for Cadence to pick market segments to compete in and abandon others–or at least return to an acquisition strategy to purchase finished products instead of using in-house resources?

    Note on revenue drop, Cadence revenue figures from http://finance.yahoo.com/q/is?s=CDNS

    Dec-07 1.62 B Annual

    Jan-09 1.04 B Annual

    Apr-09 973M Last 4 quarters (206M, 227M, 232M, 308M)

    so 1.04/1.62 = 36% drop; 973 / 1620 = 39% drop
    (By comparison the Synopsys numbers for Oct-08 1.34 B, Oct-07 1.21B or about 10% growth, and last four quarters from Apr-30 totaled 1.37 (337M,340M,353M,344M); source again http://finance.yahoo.com/q/is?s=SNPS also the four quarter moving average for Q4 2008 declined 9.4% compared to Q4/2007 according to http://www.edac.org/downloads/pressreleases2009/MSS_Q4_2008_PressRelease_20090326_final.pdf Cadence was roughly a 1/5 to 1/3 of total industry revenue in this time frame so their decline accounts for most of–and perhaps more than–the industry decline.)

    Are you targeting your R&D development at specific areas or are you still planning to be a “broad line supplier”?

    4. Richard Goering, now at Cadence, recently interviewed Chi-Ping Hsu (see http://www.cadence.com/Community/blogs/ii/archive/2009/06/25/q-amp-a-interview-chi-ping-hsu-describes-5-cadence-initiatives.aspx ) and they talked about the MPI (metric driven productivity)initiative for analog design. Do you have similar initiatives aimed at global teams doing front end design? What are the implications from global teams for the evolution of your design environments?

    5. In particular, are applications like Mentor’s Xtreme Design series (see http://www.mentor.com/products/pcb-system-design/layout-routing/xtreme-design/ ) that allow multiple designers (or auto-routers) to collaborate in real time on a common design database an emerging paradigm for design teams that span the globe.

  2. Daniel

    Sean,
    Thanks for the list of questions. I’ll get to post answers to them in the next week or so.

  3. jblyler

    Recent announcements suggest Cadence is leaving the digital design arena. You might want to focus on what Cadence believes are now their core competencies. Naturally, their response will be guarded. Have fun.

  4. Daniel

    John,
    Wow, that would be a huge move for Cadence to leave the digital design arena. These are the guys that bought Verilog…

  5. chitlesh

    @jblyler do you have some concrete input about Cadence’s leaving the digital design arena ?

    I have recently ported a company’s home-made scripts to RTL Compiler. Do you know how it will affect RTL Compiler’s futures optimization features ?

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