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Accelerate Coverage Closure and Debug with Synopsys AI-Driven Verification Solutions
May 24 @ 10:00 am - 10:45 am UTC+5.5
Engineering resources are getting stretched thinner and thinner as design complexity increases. Automation is a significant driver to help engineers overcome resource constraints and meet critical time-to-market windows. Two of the top three challenges cited by the engineering community in a recent survey are in the areas of coverage closure and system-level debug. How do we efficiently and accurately understand and reach coverage closure and how do we accelerate and maximize the debug process? These challenges can be addressed with the latest Synopsys AI-Driven debug automation and coverage closure technologies.
In this webinar, we’ll discuss Synopsys Verdi Regression Debug Automation (RDA), the ground-breaking AI-driven debug technology that includes the necessary predictive analysis to automate the manual and error-prone process of finding the root cause(s) of failures in the design-under-test (DUT) and testbench.
We’ll also explore the latest Synopsys simulation technologies – Verification Space Optimization (VSO.ai) and VCS Intelligent Coverage Optimization (ICO). These AI-driven technologies help accelerate and improve coverage, expose more bugs, and reduce regression turnaround time.
Product Marketing Manager, Staff
Taruna Reddy is a Staff Product Manager in the EDA Group at Synopsys. Taruna has 18 years of experience in EDA and functional verification. Prior to joining Synopsys, Taruna held field applications and verification engineering positions at Mentor Graphics, Verilab and Xtreme-EDA. She holds a MSEE from Clemson University and Bachelor of Technology from India.