CadenceCONNECT – Mission Critical 2021

Overview

CadenceCONNECT will introduce you to optimized design methodologies for mission-critical electronics system applications like A&D, safety, security, 5G, and others. The event brings together Cadence® technology users, developers, and industry experts for networking, sharing best practices on critical design and verification, and discovering new techniques for designing advanced silicon, SoCs, and systems.

Keynote

10:00 am – 10:25 am (EDT)

Computational Software for Intelligent System Design and Maximum Verification Throughput

Paul Cunningham, Ph.D. Senior Vice President and General Manager, System & Verification Group, Cadence

Agenda

System Oriented

10:30 am – 11:00 am (Bombardier) Automated Meshing and Adaptive Re-Meshing at Bombardier

11:00 am – 11:30 am (Northrop Grumman) Emulation Digital Twin for SoC with eFPGA

11:30 am – 12:00 pm (Medtronic) Dynamic Duo Verifies a Patient-Provider Telemedical System

12:00 pm – 12:30 pm (L3 Harris) Robust FPGA Verification and Quantified Metrics for Safety-Critical Missions

12:30 pm – 1:00 pm (Northrop Grumman) Continuous Front-End Design and Verification Metrics Analysis to Speed System Deployment

1:00 pm – 1:30 pm (Analog Devices) Fault Campaign Framework for ISO 26262 Compliance

1:30pm – 2:00pm (Nano Dimensions) Additively Manufactured Electronics (AME) From Design to Fabrication

IC/Packaging

10:30 am – 11:00 am (Motorola) Delivering Mixed-Signal Design in 22FDX MSOA Flow with Innovus

11:00 am – 11:30 am (Rianta) Power Optimization via Joules

11:30 am – 12:00 pm (Texas Instruments) Using Design Intent and Simulation Driven Routing for Power Critical Circuit Designs

12:00 pm – 12:30 pm (Analog Devices) Electromagnetic Simulation of Large Chip/Package Designs Using Clarity

12:30 pm – 1:00 pm (BroadPak) Large-Scale Silicon Interposer Design Methodology in Allegro APD+

1:00 pm – 1:30 pm (Rohde-Schwarz) Enhancing the Accuracy of RF Front-End Simulations with Standard Compliant Signal Processing

1:30 pm – 2:00 pm (Butterfly) Real Number Modeling for Mixed-Signal Verification

*Note times are Eastern Daylight Time

Agenda subject to change