Ensuring Standards Compliance: Automating Post-Route Analysis for Hundreds of Serial Links

Presented by Todd Westerhoff, Product Marketing Manager for High-Speed System Design, Siemens EDA

Abstract

The PCB layout team has just handed you back a routed database with hundreds of serial links routed to your specifications — now what? How can you validate every link-as-routed for protocol compliance before releasing the design? If you’re like most designers, you can’t afford to model and simulate each link individually, so you pick some representative links, simulate them, ensure the rest are physically similar, release the design and hope for the best. But — what if you could afford to run protocol compliance on each link-as-routed, with 3D full-wave EM modeling accuracy? This webinar will show you the process that makes it possible.

Presenter Bio:

Todd Westerhoff is the Product Marketing Manager for High-Speed System Design at Siemens EDA. He has over 42 years of experience in electronic system modeling and simulation, including 24 years of signal integrity experience. Prior to joining Siemens, Todd held senior technical and management positions at SiSoft, Cisco and Cadence. Prior to that, he worked as an independent signal integrity consultant. Todd has a particular interest in old computers and has built working replicas of PDP-8/I and PDP-11/70 computers, running TSS/8 and RSX-11M, respectively.