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Keeping Latency to a Minimum with 400G/800G Ethernet IP

October 6, 2021 @ 10:00 am - 11:00 am PDT

Synopsys October 6

A large volume of data is required for high performance computing (HPC) workloads in data centers. As a result, enabling data processing between machines and servers across long reach channels at high rates becomes mandatory. SoCs for HPC applications such as data center, networking and AI, must support high throughput and minimum latency with maximum channel insertion loss. Designers can meet such requirements with compliant IP on most advanced FinFET processes.

Attend this Synopsys webinar to learn how to:

  • Meet the performance and power targets of your HPC SoCs requiring 100G, 200G, 400G 800G Ethernet links
  • Minimize latency across long reach channels with an integrated Ethernet MAC and SerDes PHY IP solution that includes PCS, PMD, PMA and auto negotiation functionalities
  • Get ready for the world of 1.6Tb Ethernet and its required building block


October 6, 2021
10:00 am - 11:00 am PDT
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