EDA
Silvaco UseRs Global Event (SURGE) 2023 – China
Silvaco UseRs Global Events (SURGE) bring together users, developers, and industry experts of the EDA, IP, and TCAD communities to understand new semiconductor technologies, innovative applications, and techniques for realizing advanced designs. Presentations A variety of presentations will cover semiconductor device simulation, circuit design and verification, and IP design. Roadmaps and exciting technology updates will… Read More »Silvaco UseRs Global Event (SURGE) 2023 – China
Solve EM Fields and Forces in PCBs for Consumer Electronics
This webinar will demonstrate how Ansys tools can improve PCB designs for higher performance and reliability. Ansys Maxwell simulates low-frequency (LF) EM fields to identify potential EMI/EMC issues for shielding and grounding purposes. Engineers can also predict electric currents distributed throughout the PCB power traces and study the EM forces generated by the magnetic field… Read More »Solve EM Fields and Forces in PCBs for Consumer Electronics
RTL-to-GDSII Flow for ASIC Design Using Cadence Tools
Would you like to know how to design a complete chip using the RTL-to-GDSII Flow? In this free technical Training Webinar with Application Engineer Sai Srinivas Pamula, we’ll teach you the essential steps in the RTL-to-GDSII design flow using a wide variety of industry-leading Cadence tools—such as the Xcelium Logic Simulator, Modus DFT Software Solution,… Read More »RTL-to-GDSII Flow for ASIC Design Using Cadence Tools
Accelerating New Product Introduction with Integrated End-to-End Analytics
Are you seeking to achieve dramatic gains in product time to market? This webinar will explore the combined solution of proteanTecs deep data analytics solutions and the PDF Solutions Exensio platform for rapid NPI. This 30-minute program will include a presentation and a LIVE DEMO of the integration of PDF Solutions' Exensio platform and proteanTecs' deep data analytics… Read More »Accelerating New Product Introduction with Integrated End-to-End Analytics
CMOS Circuit Techniques for Wireline Transmitters Part III
Synopsys Webinar – Part III In this 3-part Synopsys webinar series, we will present how hyperscale data centers are going through a paradigm shift with the advent of technologies like Artificial Intelligence (AI) and edge compute requiring hyperscale data centers to support exponential growth of data volume. This volume of network traffic demands an increase… Read More »CMOS Circuit Techniques for Wireline Transmitters Part III
Automated Power Intent Management Pre-synthesis for Large SoC Designs
With increasing chip design complexity, power intent management is becoming a requirement by chip designers. Power intent (UPF) databases are getting more and more complex and difficult to handle by designers without a reasonable level of automation. Query UPF databases, UPF creation and assembly are among the key capabilities to ease the implementation for complex… Read More »Automated Power Intent Management Pre-synthesis for Large SoC Designs
Debugging SystemC with GDB
Webinar Overview: This webinar explores debugging SystemC code with basic tools, including issues and strategies to make improvements. A large portion of the webinar includes a demonstration of a small design. Topics include single-stepping without getting lost and obtaining information about SystemC simulation status. The session concludes with ideas on how to simplify debugging and… Read More »Debugging SystemC with GDB
VLSID 2024
ITC Royal Bengal Kolkata, IndiaThe 37th International Conference on VLSI Design & the 23rd International Conference on Embedded Systems (VLSID 2024) are being held at Kolkata, India, during January 6-10, 2024. VLSID 2024 is returning to the city after 8 years since 2016. This flagship conference is bringing worldwide industry leaders, Indian and international industry bodies, and academic researchers in a… Read More »VLSID 2024
Speed Up Your Electronic Component Design with HPC
About this Webinar Electronic components design and their integration on PCBs involve complex simulations to predict EM fields and forces accurately. These simulations can be computationally intensive and time-consuming. High-Performance Computing (HPC) capability built into Ansys Maxwell core technology significantly accelerates the electronic component design process, enabling quick iteration, optimization, and validation. The ECAD capability… Read More »Speed Up Your Electronic Component Design with HPC
PCB Design Best Practices: How to fully verify your Serdes-based designs before prototype manufacture
“Right first time” is a goal we all aspire to, but how often does it really happen? Even when we follow layout rules as closely as possible, problems creep into the layout that cause issues during lab testing and result in costly, time-consuming respins. Join our expert presenter Todd Westerhoff in this LinkedIn Live… Read More »PCB Design Best Practices: How to fully verify your Serdes-based designs before prototype manufacture
Meet Advanced IC Package Design Schedule Challenges with In-Design Analysis
The heterogeneous integration of chips/chiplets has added significant complexity to the IC package design process, further compressing schedules for many design teams. Design teams must work more efficiently to meet quality and performance goals while maintaining schedule milestones. One way to improve efficiency is to shift signal and power integrity (SI/PI) analysis to earlier in… Read More »Meet Advanced IC Package Design Schedule Challenges with In-Design Analysis
Verisium SimAI: Coverage Gaps Meet Their Match
Every project has some areas that seem impossible to cover. Various factors can cause these nearly impossible-to-hit coverage gaps, including technical complexity, lack of resources, and shifting requirements. In constrained random environments, simply running more random seeds may not always address these coverage gaps effectively. Overcoming these gaps requires creativity, persistence, and technical expertise. A… Read More »Verisium SimAI: Coverage Gaps Meet Their Match