Webinar
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Keysight EDA 2025 Launch event
New EDA Tools for 5G and AI Infrastructure Design We are ready to share the latest release of our electronic design automation (EDA) software suites. This update will help you design smarter with faster multidomain insights and workflows enhanced by artificial intelligence (AI). Get the Roadmap The webinar will kick off with an overview of… Keysight EDA 2025 Launch event
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Optimizing Hardware Design with SystemRDL: Tools, Techniques, and Tips
Efficient management of registers and memory maps is critical for the success of modern System-on-Chip (SoC) designs. System Register Description Language (SystemRDL), combined with Agnisys’s IDesignSpec Suite, provides an advanced solution to automate and simplify these complex processes. In this webinar, "Optimizing Hardware Design with SystemRDL: Tools, Techniques, and Tips," we will demonstrate how the… Optimizing Hardware Design with SystemRDL: Tools, Techniques, and Tips
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Mastering EMC Simulations for Electronic Designs
Electromagnetic Compatibility (EMC) simulation ensures that electronic devices comply with regulatory standards and perform optimally in their intended environments. As the complexity of electronic systems increases, the importance of EMC simulation grows, allowing engineers to predict and mitigate potential electromagnetic interference (EMI) issues before physical prototypes are built. Overview It can be challenging for EMC… Mastering EMC Simulations for Electronic Designs
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From Concept to QoR: Practical Generative AI for ASIC Managers and Engineers
Be among the first to see how Generative AI is advancing hardware design workflows, providing solutions that reduce complexity and enable better results without steep learning curves. Witness how these tools offer immediate, practical benefits for real-world use cases. What You'll Learn: This session offers a unique opportunity to explore how Generative AI solutions with… From Concept to QoR: Practical Generative AI for ASIC Managers and Engineers
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CadenceTECHTALK: Driving Intelligent System Design with 3D-IC Multiphysics
As the industry reaches the limits of device scaling at advanced nodes, there is a growing demand for increased computing performance and data transfer in hyperscale data centers and AI designs. Advanced systems-on-chip (SoCs) are approaching the maximum size limits, and there is a need to find innovative solutions to continue scaling according to Moore's… CadenceTECHTALK: Driving Intelligent System Design with 3D-IC Multiphysics
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Accelerating SoC Automotive Design with Chiplets
Step into the forefront of innovation with our upcoming webinar, which explores how chiplet technology is revolutionizing the automotive industry and setting new benchmarks. Discover how Cadence is empowering customers to achieve unparalleled success with chiplets. Here's what you can look forward to: Mastering Chiplet Architecture: Dive into the intricacies of mastering chiplet architecture, where… Accelerating SoC Automotive Design with Chiplets
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Learn How to Utilize Victory Analytics and Machine Learning to Calibrate TCAD Data
Abstract Physics-based design using technology computer-aided design (TCAD) has provided fundamental contributions to R&D in the semiconductor industry. Traditionally, TCAD modeling is mostly developed manually by expert designers using a trial-and-error procedure. However, the imperative acceleration of time-to-market to reduce development expenses calls for renovation of these conventional TCAD approaches. Machine learning (ML) and artificial… Learn How to Utilize Victory Analytics and Machine Learning to Calibrate TCAD Data
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Advantages of using IP-XACT and TGI for SoC Development
Are you looking for ways to simplify your SoC development process, reduce rework, and accelerate time-to-market? Join us for an insightful webinar, "Advantages of using IP-XACT and TGI for SoC Development," where we’ll explore how the latest features of IP-XACT 2022 can revolutionize your SoC design workflows. What’s on the Agenda? Introduction to IP-XACT: A… Advantages of using IP-XACT and TGI for SoC Development
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Signal and Power Integrity Challenges in Advanced Packaging Technologies for Disaggregated Integration
Abstract The integrated circuit industry faces new challenges as chip complexity and area have been increasing to prohibitive ranges. Some segments have been adopting then a relatively new paradigm for heterogeneous integration based on chiplets at the first package level in combination with advanced 2.5 and 3D packaging technologies. The chiplet approach has the advantage… Signal and Power Integrity Challenges in Advanced Packaging Technologies for Disaggregated Integration
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Simulating Auto Systems & E/E Architectures for power and performance using VisualSim
Estimating latency and power for different use-cases in Systems, ECU and Networks Overview: This session will focus on a common system-level simulation platform that can be shared by Semiconductor companies, Tier One Suppliers, OEMs in designing the entire E/E architecture. The transition to everything digital and electronics is causing a number of design challenges across the… Simulating Auto Systems & E/E Architectures for power and performance using VisualSim
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Mastering SoC Design and Verification for DO-254 Compliance
System on Chip (SoC) devices are transforming the landscape of advanced aviation systems, offering unparalleled integration of multiple functionalities within a single chip. These compact powerhouses bring numerous advantages, from reduced power consumption to enhanced performance. Yet, their inherent complexity introduces unique safety assurance challenges that must be addressed to meet DO-254 standards. Join this… Mastering SoC Design and Verification for DO-254 Compliance
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Using AI in development and product for FPGA
Renishaw plc New Mills, Wotton-under-Edge, Gloucestershire, United KingdomFPGA Front Runner - Using AI in development and product for FPGA How are they used? What input language is used and how does it find it’s way into the FPGA? How is the AI trained? Any use case example Agenda (GMT) Time Speaker Details 09.00 Arrival and registration 09:30 Pete Leonard, Renishaw Introduction to… Using AI in development and product for FPGA