Webinar
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Elevate Your Analog Layout Design to New Heights
Are you ready to transform your career and become a master of analog layout design? Look no further than The Advanced Analog Layout Course! This course is meticulously crafted to enhance your physical design skills, guiding you through the advanced techniques essential for creating top-notch, well-matched, and noise-resistant layouts on a CMOS process. Learn Anytime, Anywhere! Our course is delivered through a user-friendly… Elevate Your Analog Layout Design to New Heights
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Hardware-Accurate Digital Twins in Defense: Case Study
The defense industry is increasingly seeking innovative approaches to accelerate system development while ensuring reliability. Hardware-accurate digital twins offer a promising solution. This webinar will explore the concept of hardware-accurate digital twins and their application in defense. Join Cadence and Northrop Grumman as we delve into a real-world case study demonstrating the power of digital… Hardware-Accurate Digital Twins in Defense: Case Study
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Enhanced Packaging Performance and Manufacturing with Physics-Based 3D Simulation
About this webinar Digital engineering is ramping up across the CPG, healthcare and wider packaging sector. Packaging engineers are tasked with producing fit-for-purpose packaging that is optimised for customer-use, transportation, storage and for production-line filling/handling. In addition, manufacturing the packaging containers as optimally as possible to avoid defects is vitally important. All in the landscape… Enhanced Packaging Performance and Manufacturing with Physics-Based 3D Simulation
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Using OSVVM’s AXI4 Verification Components
Abstract: This “Getting Started” presentation is for engineers who need to use the OSVVM AXI4 verification components (VCs) in their testbenches. Part 2 of this presentation focuses on how to write tests and configure the AXI4 VCs. AXI4 VCs are probably the most complex VCs in the OSVVM library. This complexity is due to the… Using OSVVM’s AXI4 Verification Components
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Can AI make cameras see in the dark?
Abstract As cameras become ubiquitous in applications such as surveillance, mobile, drones, and automotive systems, achieving clear vision 24/7 under any condition—including extreme low light and high dynamic range scenarios—has become essential. By leveraging Edge AI processors, a software ISP based on neural network technology can process and optimize video in real-time, surpassing human… Can AI make cameras see in the dark?
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Faster Design TAT and Upscaled Team Productivity with Cadence’s True Hybrid Cloud
Join us for an informative webinar as we unveil the new hybrid cloud capabilities of our cloud solutions designed to revolutionize EDA workloads. Whether you need peak capacity for a short duration or want a front-to-back turnkey cloud environment, our cloud solutions offer unparalleled flexibility and efficiency. We will discuss how Cadence True Hybrid Cloud… Faster Design TAT and Upscaled Team Productivity with Cadence’s True Hybrid Cloud
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Questa Formal Verification IP AMBA: Achieve Protocol Compliance in Designs
Delve into how Questa Formal Verification IP (VIP) for the AMBA protocol ensures that designs incorporating AMBA adhere strictly to the protocol; all without the need for simulation. The solution integrates comprehensive protocol knowledge and provides user-friendly interfaces, significantly reducing the setup time for verification environments. Optimized for top-tier performance and scalability, Questa Formal VIP… Questa Formal Verification IP AMBA: Achieve Protocol Compliance in Designs
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Addressing 3D-IC Power Integrity Design Challenges
Power network design and analysis of 3D-ICs is a major challenge because of the complex nature and large size of the power network. In addition, designers must deal with the complexity of routing power through the interposer, multiple dies, through-silicon vias (TSVs), and through-dielectric vias (TDVs). In this webinar, you will learn how the Cadence… Addressing 3D-IC Power Integrity Design Challenges
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Leveraging Verisium Debug to Debug Digital-Mixed Signal Designs
Many of today’s designs that are primarily digital also contain analog components. We refer to such designs as “Digital-Mixed-Signal” or DMS designs. In this webinar, we will demonstrate using the Verisium Debug App to debug such DMS designs. What You Will Learn How Verisium Debug supports debugging Xcelium (Real Number Modeling) RNM and mixed Xcelium… Leveraging Verisium Debug to Debug Digital-Mixed Signal Designs
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Unleash Performance, Save Power: Mastering Processor Customization with the Tensilica Instruction Extension (TIE) Language
Join us for an engaging webinar where we show you how to turbocharge performance and minimize power consumption by harnessing the power of custom instructions using the TIE language. Don't miss this opportunity to optimize your processors like never before! TIE enables you to compute and move data many times faster than conventional processors, resulting… Unleash Performance, Save Power: Mastering Processor Customization with the Tensilica Instruction Extension (TIE) Language
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Managing Constraints Like a Pro in OrCAD X
Join us in this constraint-focused webinar to learn all the best practices for managing constraints in your design with OrCAD X Presto PCB Editor. We’ll cover everything from the basics of setting up spacing and physical constraints to advanced electrical constraints, which are critical for HDI designs. The webinar will feature a brief presentation, a… Managing Constraints Like a Pro in OrCAD X
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Redefining Mobile Experiences with AI
The Arm platform is providing the foundation for the next wave of AI smartphones and laptops. As AI models rapidly evolve, we’re seeing that software begins to outpace hardware, requiring additional innovation at all levels of the compute stack. To meet these growing demands, the Arm platform offers a new compute solution for maximum performance… Redefining Mobile Experiences with AI