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Synopsys Technical Forum 2024
San Jose Marriott 301 S Market Street, San Jose, CA, United StatesPlease join us for our in-person Synopsys Technical Forum, taking place during SPIE Advanced Lithography + Patterning 2024. Attendees will learn about the latest industry trends along with Synopsys Manufacturing's mask synthesis, mask data prep, and lithography simulation solutions. The Tech Forum is peer-to-peer, giving you the opportunity to hear how your lithography colleagues have… Synopsys Technical Forum 2024
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From code to solution: tools and tactics for aerospace fault code troubleshooting
Join us in this insightful webinar as we delve into the world of aerospace and defense electrical fault code troubleshooting, unveiling the power of Capital™ Service Explorer. Discover innovative strategies to diagnose issues swiftly, minimizing downtime and optimizing product performance. Explore real-world examples showcasing how Capital Service Explorer facilitates the identification of commonalities among multiple… From code to solution: tools and tactics for aerospace fault code troubleshooting
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Keysight EDA Connect World Tour: Santa Clara – High Speed Digital
Keysight Technologies 5301 Stevens Creek Boulevard, Santa Clara, CA, United StatesShift Left with the Modern Design Center Artificial intelligence (AI) is redefining high-speed digital designs. Your ability to design, simulate, and test — using an automated, integrated workflow — is what will set you apart. Whether you are a design team leader, digital designer, or system engineer, this one-day event is for you. We have… Keysight EDA Connect World Tour: Santa Clara – High Speed Digital
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Keysight EDA Connect World Tour: Santa Clara – RF Day
Keysight Technologies 5301 Stevens Creek Boulevard, Santa Clara, CA, United StatesShift Left with the Modern Design Center Artificial intelligence (AI) is redefining communication and connectivity. Your ability to design, simulate, and test — using an automated, integrated workflow — is what will set you apart. Whether you are a design team leader, RF designer, or system engineer, this one-day event is for you. We have… Keysight EDA Connect World Tour: Santa Clara – RF Day
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Manufacturing driven design – DFM within an Xpedition Flow
We often think of Design for Manufacturing (DFM) as the sole responsibility of the fabricator. Over the years, many OEMs have implemented DFM as a final check in their release process, but that approach does not prevent issues within a design from piling up and being left for a DFM engineer to identify and communicate… Manufacturing driven design – DFM within an Xpedition Flow
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DVCon USA 2024
The DoubleTree by Hilton 2050 Gateway Place, San Jose, CA, United StatesThe Design & Verification Conference & Exhibition is the premier conference on the application of languages, tools, methodologies and standards for the design and verification of electronic systems and integrated circuits. The focus of this highly technical conference is on the practical aspects of these technologies and their use in leading-edge projects to encourage attendees… DVCon USA 2024
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Agile Analog Technology Showcase Event
The Royal Society of Edinburgh 22-26 George Street, Edinburgh, United KingdomLearn how innovative analog IP can help analog design engineers. Agile Analog is transforming the analog IP industry, with Composa, our configurable, multi-process technology that automatically generates analog IP. We offer a wide-variety of novel analog IP solutions for Data Conversion, Power Management, IC Monitoring, Security and Always-On IPs. Applications include High Performance Computing (HPC),… Agile Analog Technology Showcase Event
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Navigating the Power Challenges of Datacenter Infrastructure
The surge in applications such as AI, HPC, and GPU-intensive workloads requires unparalleled performance, placing cloud vendors and enterprise datacenters under immense pressure to simultaneously maximize power efficiency, reduce costs, and adhere to stringent environmental standards. Join us for a 1-hour panel discussion featuring unique perspectives from industry experts at Intel, Microsoft, Arm and proteanTecs. We will explore… Navigating the Power Challenges of Datacenter Infrastructure
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Efficient Design Methodology for 112G Interface Compliance
As 112G+ data transfer becomes the new normal, companies risk schedule delays unless they improve the efficiency of their multi-board design methodology. An efficient design methodology looks at signal and power integrity early and often as the design progresses. In addition, with the precision required to meet 112G compliance, companies can take extra steps to… Efficient Design Methodology for 112G Interface Compliance
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What’s New About Virtuoso Layout Suite?
Accelerate Layout Creation with Automated Place and Route in Virtuoso Studio How can you cut down custom layout implementation from days to minutes? Custom device-level automated place and route (APR) for advanced nodes has very different requirements than mature node chip assembly routing. With our new unified APR flow-based user interface integrating the various automation… What’s New About Virtuoso Layout Suite?
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GSA International Semiconductor Conference
Here East 14 E Bay Lane, London, United KingdomInaugural GSA event in partnership with the UK Government. Meet senior business leaders, investors, and public policy officials from around the world. Across two days, join us for exciting discussions on semiconductor innovation for a NetZero economy, with a view on the dramatically changing supply chain, government interventions and industry outlook. Semiconductor Innovation for… GSA International Semiconductor Conference
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New Advanced Techniques for Reset Domain Crossing (RDC) Analysis
Designers increasingly use complex reset signaling architectures to meet high-performance, low-latency, and low-power requirements. Specifically, independent reset domains are created by complex reset sequences, reset circuitry, and the intermixing of IPs with different reset schemas, power-management domains, and security domains or functionality. This increase in reset signaling complexity is creating new RDC verification challenges that… New Advanced Techniques for Reset Domain Crossing (RDC) Analysis
12 events found.