Chiplet Summit
DoubleTree Hotel 2050 Gateway Place, San Jose, CA, United StatesThe First Annual Chiplet Summit is the show chip designers can’t miss if they want to stay competitive. They’ll get the scoop on ways to make their chiplets run faster,… Read More »Chiplet Summit
Device Modeling Using Silvaco Utmost IV
In this webinar, Silvaco will present some of the 2022 Baseline enhancements to our Utmost IV Device Modeling tool. We will introduce the Corner and Retargeting Module, the most recent… Read More »Device Modeling Using Silvaco Utmost IV
DesignCon 2023
Santa Clara Convention Center 5001 Great America Parkway, Santa Clara, CA, United StatesDesignCon is the premier high-speed communications and system design conference and exposition, offering industry-critical engineering education in the heart of electronics innovation — Silicon Valley. Three days of education, exhibits,… Read More »DesignCon 2023
DVClub Europe: Make Verification Fun Again with Python and cocotb
cocotb is an open source coroutine-based cosimulation testbench environment for verifying VHDL and SystemVerilog RTL using Python. cocotb connects a testbench written in Python with almost all industry-standard simulators. Additionally,… Read More »DVClub Europe: Make Verification Fun Again with Python and cocotb
Synopsys VC Formal DPV Virtual Workshop Series
Day 1 (February 1, 2023) of this workshop series will cover practical knowledge of the best datapath verification strategies and provide hands-on experience with the industry's best-in-class datapath validation app… Read More »Synopsys VC Formal DPV Virtual Workshop Series
Is your disk space usage out of control using Perforce, GIT, or Subversion (SVN)?
Learn how to gain control of your disk space with the 3-Pronged Smart Storage Strategy Forget the traditional way of managing data storage, let us show you how to optimize… Read More »Is your disk space usage out of control using Perforce, GIT, or Subversion (SVN)?
DVClub Europe – Best Conference Papers from 2022
Best Conference Papers from 2022 These papers are selected from DVCon and CadenceLive! in 2022 as being most relevant to the DVClub Europe community. Agenda (GMT) 12:00 Welcome and Introduction… Read More »DVClub Europe – Best Conference Papers from 2022
Synopsys VC Formal DPV Virtual Workshop Series
Day 1 (February 1, 2023) of this workshop series will cover practical knowledge of the best datapath verification strategies and provide hands-on experience with the industry's best-in-class datapath validation app… Read More »Synopsys VC Formal DPV Virtual Workshop Series
Implementing DFT in 2.5/3D designs using Tessent Multi-die software
In the era of more-than-Moore’s law, chip makers are scaling by adopting complex architectures that connect dies vertically (3D IC) or side-by-side (2.5D). There has been progress throughout the semiconductor… Read More »Implementing DFT in 2.5/3D designs using Tessent Multi-die software
Webinar: The Rise of the Chiplet
Join us this Thursday, February 9th to talk about The Rise of the Chiplet. Moderated by SemiEngineering’s Brian Bailey, this webinar will dive into the current landscape for chiplet technology, predictions… Read More »Webinar: The Rise of the Chiplet
Formal Verification for Non-Specialists
Is formal verification ready for general use or do you need a PhD to use it? Larger companies continue to recruit formal PhDs into their verification teams while other less-well-qualified engineers… Read More »Formal Verification for Non-Specialists
International Symposium on Field-Programmable Gate Arrays
Monterey Marriott 350 Calle Principal, Monterey, CA, United StatesThe ACM/SIGDA International Symposium on Field-Programmable Gate Arrays is a premier conference for presentation of advances in FPGA technology. In 2023, the 31st edition of FPGA will be held in… Read More »International Symposium on Field-Programmable Gate Arrays