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Introduction to Questa Lint and CDC for Designers
Have you ever had RTL code that passes simulation but still fails due to things like unreachable code, out-of-range violations, or incorrect order of execution? Have you ever dealt with a multi-clock design that had glitch or reconvergence issues in silicon that took weeks to root cause? See how the correct verification tools can resolve… Introduction to Questa Lint and CDC for Designers
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Learn How to Perform Device Meshing with Silvaco’s Victory Mesh TCAD Solution
ictory Mesh is Silvaco’s TCAD solution for device meshing and solid modeling. Victory Mesh creates suitable meshes from process structures for device simulation. For example, the results produced by process simulation software, such as Victory Process, are remeshed in Victory Mesh to produce input for device simulation software, such as Victory Device. Victory Mesh provides… Learn How to Perform Device Meshing with Silvaco’s Victory Mesh TCAD Solution
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Boost Your CXL Verification from IP to System Level
Register now for this CadenceTECHTALK, where we will walk you through CXL verification challenges from IP level to system level and demonstrate how these challenges can be significantly mitigated using the Cadence® Verification IP (VIP) solution for advanced verification methodologies. Specifically, this webinar will cover following topics: Growing market needs for CXL Verification challenges of… Boost Your CXL Verification from IP to System Level
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Future of Semiconductor Design: 2022 Predictions & Trends
As the semiconductor industry continues to grow at an exponential rate, so has its challenges. We recently surveyed semiconductor design professionals on the biggest challenges, trends, and opportunities facing the industry today. Join Methodics experts, Simon Butler (General Manager) and Vishal Moondhra (Vice President Solutions) to review our findings and learn how you can thrive… Future of Semiconductor Design: 2022 Predictions & Trends
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AltiumLive 2022
Join us at AltiumLive 2022: CONNECT, where you will Learn, Connect, and Get Inspired in a new immersive experience that includes multiple technical tracks and a multitude of networking opportunities. In partnership with Apex Expo IPC Four Exciting Keynote Presentations from Industry Leaders 30+ Technical Sessions on five uniquely curated tracks: Design Principles & PracticesAltium Designer &… AltiumLive 2022
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ASIP Virtual Seminar 2022
Extending RISC Processors into Flexible Accelerators using ASIP Designer Case Studies in Artificial Intelligence and Image Signal Processing The slow-down of Moore’s law and Dennard scaling has triggered an increased awareness of application-specific instruction-set processors (ASIPs). These processors implement a specialized instruction-set architecture (ISA) tailored to the application domain, often starting from a baseline such… ASIP Virtual Seminar 2022
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Everything You Need to Know about SystemVerilog Arrays
This webinar gives a comprehensive guide to all aspects of SystemVerilog arrays: ordinary static arrays, dynamic arrays, queues and associative arrays. It also includes array methods and practical examples. Topics: Review of Verilog array types SystemVerilog packed and unpacked arrays SystemVerilog dynamic arrays SystemVerilog queues SystemVerilog associate arrays Array manipulation methods. Coding examples are shown… Everything You Need to Know about SystemVerilog Arrays
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Methodics User Group
Join our monthly session with Methodics IPLM experts and other users for open discussion, Q&A, and product demos. Next Session: February 8 | 1:00 P.M. EST Each 45-minute session offers a new opportunity to: Learn/share best practices. Interact with and learn from other users. Have Q&A time with our product experts on usage and methodology.… Methodics User Group
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Zero Trust Supply Chains and the Risk of Gray Market Chips
The recent shortage of chip supply and long lead times prompted system makers to turn to second tier suppliers and distributors for fulfilling their semiconductor needs. This in turn has put a spotlight on the growing concern of fraudulent or counterfeited Integrated Circuits (ICs). This webinar will discuss challenges and new approaches to supply chain… Zero Trust Supply Chains and the Risk of Gray Market Chips
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Exploring a Software First Approach to Avoid SoC Re-spins
Traditional coverage-based verification methods are no longer sufficient to verify complex SoCs integrating many processor cores and IP subsystems. To conquer the verification challenge of complex SoCs, companies are shifting their development paradigm to a software first approach. By considering the target software up front, as a critical part of the SoC development process, designs… Exploring a Software First Approach to Avoid SoC Re-spins
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Accelerate Innovation with the Omnis Automotive Wizard for CFD Simulations
Overview There is no time to waste in the automotive industry, where time to market is less than a year these days. That’s one of the reasons computational fluid dynamics (CFD) simulation has become crucial in automotive design, as it enables engineers to accurately predict and understand real-world behavior of their vehicles early in the… Accelerate Innovation with the Omnis Automotive Wizard for CFD Simulations
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Managing the Complexity of FinFET Standard Cell Layout with Cello
FinFET technologies have enabled designs with increased density and performance while reducing power, when compared to MOSFET. However, this comes at a cost of increased design complexity. Not only are some undesirable layout dependent effects more pronounced, but design rules have become much more complex. Many design rules violations can no longer be fixed within… Managing the Complexity of FinFET Standard Cell Layout with Cello
12 events found.