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Global Foundries Technology Summit – EMEA

GlobalFoundries Fab 1 Wilschdorfer Landstrasse 101, Dresden, Germany

DAY 1 Wednesday, September 28, 2022 Doors Open 3:00pm CET   DINNER Restaurant KULTURWIRTSCHAFT, 7pm - 10pm   DAY 2 Thursday, September 29, 2022 Doors Open 8:30am CET   EVENT LOCATION GlobalFoundries FAB 1 Wilschdorfer Landstrasse 101 01109 Dresden, Germany   We are thrilled to welcome you to GF Technology Summit 2022. This exclusive, invitation-only event… Read More »Global Foundries Technology Summit – EMEA

Silicon Realization TechSummit

Santa Clara Marriott 2700 Mission College Blvd, Santa Clara, CA, United States

This year's event brings together Synopsys' Digital Design Technical Symposium and Verification Day into a single event - Synopsys Silicon Realization TechSummit. This one-day, in-person event is designed to inform executives, managers, and design and verification engineers about how the EDA industry is evolving. What Attendees Can Expect​ A keynote and presentations from leaders in… Read More »Silicon Realization TechSummit

Architecture Exploration of Automotive Networks, Radars, and Semiconductors

The buzzwords of 2022 are autonomous driving, radars, and semiconductor and they are all similar in more than one-way. All have protocols, schedulers, sensors, high performance computing, software, networks, interfaces, antennas, and attenuators. VisualSim Architect is used to architect and verify all these applications. Join us for this Webinar on Commonality in the Architecture Exploration… Read More »Architecture Exploration of Automotive Networks, Radars, and Semiconductors

Samsung Foundry Forum & SAFE Forum 2022 – US

Signia by Hilton 170 S Market Street, San Jose, CA, United States

Through the various session programs, clients, partners, and experts in each field will be able to meet again in person and prepare to go forth into the new future of the semiconductor market.   The 2022 Samsung Foundry Forum and SAFE Forum are in-person events, and will be held in San Jose in the U.S.,Munich… Read More »Samsung Foundry Forum & SAFE Forum 2022 – US

PCB West 2022

Santa Clara Convention Center 5001 Great America Parkway, Santa Clara, CA, United States

For more than 30 years PCB West has trained designers, engineers, fabricators and, lately, assemblers on making printed circuit boards for every product or use imaginable. More than 2,500 designers, fabricators, assemblers and engineers register and more than 100 companies exhibit each year at the four-day technical conference and one-day sold-out exhibition. From high-reliability military/aerospace… Read More »PCB West 2022

Post-layout Circuit Sizing Optimization

My IC design career started out with manually sizing transistors to improve performance, while minimizing layout area and power consumption. Fortunately we don’t have to do manual transistor sizing anymore, thanks to EDA tools that are quicker and more accurate than manual methods. MunEDA is an EDA vendor that has developed a tool suite for IC design… Read More »Post-layout Circuit Sizing Optimization

2022 IEEE Electronic Design Process Symposium (EDPS)

SEMI 673 S. Milpitas Blvd, Milpitas, CA, United States

We are planning to hold 2022 IEEE EDPS live! Looking forward to meeting with you face-to-face. About this event 2022 IEEE EDPS will be held on Oct 6 and Oct 7 2022 in Milpitas, CA. We have invited industry practitioners and leaders from academia to present their work in following areas: Innovative Designs and Design… Read More »2022 IEEE Electronic Design Process Symposium (EDPS)

IESA Vision Summit 2022

The LaLIT Bangalore, India

The 17th edition of IESA flagship event, IESA Vision Summit 2022 is scheduled on 12th and 13th October 2022 in Bengaluru. This is our flagship event where most of the Semiconductor and ESDM companies from India and the world come under one roof. The objective of the event is to enable DESIGN IN INDIA and… Read More »IESA Vision Summit 2022

Everything You Need to Know About Virtual ECU Abstraction Levels

Growing electronic/electrical (E/E) architecture complexity and software content in modern vehicles has propelled the use of virtualization-based testing to develop and validate functions and software components more effectively. The simulation of electronic control units (ECUs) as virtual ECUs (vECUs) has found rapid adoption in several phases of automotive development. This 30-minute Webinar will provide a… Read More »Everything You Need to Know About Virtual ECU Abstraction Levels

Assertions-Based Verification for VHDL Designs

Assertion-based verification (ABV) enables the use of assertions for the efficient verification of low-level design properties. These assertions could be verified by simulation and formal verification methods. The VHDL 2008 standard includes Property Specification language (PSL) to express design properties for both simulation and static formal analysis. For mixed-mode simulations of VHDL designs with SystemVerilog… Read More »Assertions-Based Verification for VHDL Designs

SNUG Europe

Hilton Munich Airport Terminalstraße Mitte 20, 85356 München-Flughafen, Munich, Germany

Since 1991, the Synopsys Users Group (SNUG) has represented a global design community focused on innovating from Silicon to Software. Today, as the electronics industry’s largest user conference, SNUG brings together over 12,000 Synopsys tool and technology users around the world. In addition to peer-reviewed technical presentations and insightful keynotes from industry leaders, SNUG provides… Read More »SNUG Europe

Cadence Further Streamlines MMIC, RFIC, and RF SiP Design Workflows

Demand for next-generation wireless communication, aerospace, and transportation systems is driving the need for high-performance, cost-sensitive silicon RFICs and III-V compound semiconductor monolithic microwave integrated circuits (MMICs), often integrated into advanced system-in-package (SiP) modules. Join us as we demonstrate how the key new features of the Cadence® AWR Design Environment platform: Accelerates design entry and platform design sharing to… Read More »Cadence Further Streamlines MMIC, RFIC, and RF SiP Design Workflows