QuantumATK V-2023.09 Release: Highlights of New and Enhanced Features
Join our FREE online event to learn about the new and enhanced features and performance improvements in the latest QuantumATK V-2023.09 product release. - Enhanced ease-of-use of training Machine-Learned FFs… Read More »QuantumATK V-2023.09 Release: Highlights of New and Enhanced Features
Efficient Bluespec RISC-V Processor Verification for Highest Coverage Closure: A Comprehensive Case Study
The ability to mix and match multiple ISA extensions and add user-defined ISA extensions makes RISC-V verification more challenging than conventional processor verification. This Synopsys webinar demonstrates the verification of… Read More »Efficient Bluespec RISC-V Processor Verification for Highest Coverage Closure: A Comprehensive Case Study
UCIe-Based Chiplet Verification – from IP to SoC
Innovative die disaggregation technologies, enable a future where a catalog of chiplets will be available to mix and match based on the end application. The industry’s fastest emerging interconnect standard… Read More »UCIe-Based Chiplet Verification – from IP to SoC
SNUG Singapore 2023
ParkRoyal on Beach Road 7500 Beach Rd, Singapore, SingaporeSince 1991, the Synopsys Users Group (SNUG) has represented a global design community focused on innovating from Silicon to Software. Today, as the electronics industry’s largest user conference, SNUG brings… Read More »SNUG Singapore 2023
Applications of Formal Verification
It is an exciting time to explore a career in the VLSI semiconductor sector, and we're here to help you gain clarity on buzz and provide information on educational options… Read More »Applications of Formal Verification
20th International Conference on IC Design and Technology (ICICDT)
University of Tokyo 7 Chome-3-1 Hongo, Tokyo, Japan2023 ICICDT is the twentieth edition (20th) in the series of the International Conference on IC Design and Technology, organized since 2004. 2023 ICICDT will be co-organized and held at… Read More »20th International Conference on IC Design and Technology (ICICDT)
Unleashing Innovation with UCIe
Exploring the Next Frontier in Chip Integration Webinar Agenda : Introduction to all UCIe layers Decrypting FLITs, PHY Trainings, Bring up flows FDI-RDI , main band and side band FLIT… Read More »Unleashing Innovation with UCIe
GTS 2023 – Munich
Sofitel Munich Bayerpost Bayerstrasse 12, Munich, GermanyRegister now and join us at GlobalFoundries Technology Summit 2023! GF Technology Summit (GTS) 2023 is our worldwide, annual series of technology-focused events. GTS brings together leaders from the commercial, business and… Read More »GTS 2023 – Munich
Synopsys VSO.ai Virtual Workshop
Virtual workshop with hands-on labs Achieving coverage closure continues to remain a challenge for customers and there is a growing need for a system to work autonomously to reach the… Read More »Synopsys VSO.ai Virtual Workshop
TSMC 2023 North America OIP Ecosystem Forum
Santa Clara Convention Center 5001 Great America Parkway, Santa Clara, CA, United StatesLearn About: Emerging advanced node design challenges and corresponding design flows and methodologies for N2, N3/N3E/N3P/N3AE, N4/N4P, N5/N5A, N6/N6e/N6RF/N7, N12e, and N22 Latest updates on TSMC 3DFabric™ chip stacking and… Read More »TSMC 2023 North America OIP Ecosystem Forum
Cadence Training: Cerebrus Intelligent Chip Explorer
Please join me, Cadence Training and Application Engineer Krishna Atreya, for this free technical Training Webinar. What Is the Webinar About? The Cadence Cerebrus Intelligent Chip Explorer is a revolutionary,… Read More »Cadence Training: Cerebrus Intelligent Chip Explorer
Stratus HLS Automated Power Shutoff to Minimize Power and Retention Registers
Power Shutoff is a popular technique for saving power during functionally idle periods. Implementing Power Shutoff requires a detailed understanding of which resisters must be retained to enable bring-up from… Read More »Stratus HLS Automated Power Shutoff to Minimize Power and Retention Registers