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System Simulation of Versal ACAP Designs
AVersal ACAP, developed by Xilinx/AMD, is a groundbreaking adaptable platform composed of AI Engine (AIE), Processing System (PS), Programmable Logic (PL), Network on Chip (NoC) and a wide range of… System Simulation of Versal ACAP Designs
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Latest Innovations and Updates in ASICs
In this webinar Jeff DiCorpo & Matt Venn will delve into the latest ASIC developments, including the game-changing OpenFrame – a new Caravel version expanding your design possibilities by 50%.… Latest Innovations and Updates in ASICs
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RTL Power Optimization: Applying Best Practices to Overcome Low-Power Design Challenges
Designers face enormous challenges for low-power designs. Whether it is IoT at the edge, AI in the datacenter, robotics or ADAS, the demand for increased functionality in SoCs is rapidly… RTL Power Optimization: Applying Best Practices to Overcome Low-Power Design Challenges
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Silvaco UseRs Global Event (SURGE) 2023 – EMEA
Silvaco UseRs Global Events (SURGE) bring together users, developers, and industry experts of the EDA, IP, and TCAD communities to understand new semiconductor technologies, innovative applications, and techniques for realizing… Silvaco UseRs Global Event (SURGE) 2023 – EMEA
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Silvaco UseRs Global Event (SURGE) 2023 – Taiwan/Singapore
Silvaco UseRs Global Events (SURGE) bring together users, developers, and industry experts of the EDA, IP, and TCAD communities to understand new semiconductor technologies, innovative applications, and techniques for realizing… Silvaco UseRs Global Event (SURGE) 2023 – Taiwan/Singapore
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FPGA Frontrunner Meet & Greet
Thales 350 Longwater Avenue, Reading, United KingdomThe FPGA Front Runners event will be hosted by Thales at their venue in Reading. The event will focus on “Security at System Level, and what security features we need… FPGA Frontrunner Meet & Greet
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Silvaco UseRs Global Event (SURGE) 2023 – Japan
Silvaco UseRs Global Events (SURGE) bring together users, developers, and industry experts of the EDA, IP, and TCAD communities to understand new semiconductor technologies, innovative applications, and techniques for realizing… Silvaco UseRs Global Event (SURGE) 2023 – Japan
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Making the Right Connections – Taking the Guess Work out of DFT Connectivity Validation
System-on-Chip (SoC) designs continue to grow in both size and complexity in order to meet the ever-growing performance and power demands associated with modern technology. To keep up with this… Making the Right Connections – Taking the Guess Work out of DFT Connectivity Validation
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Auto-generation of Verification Infrastructure for IP to SoC
Agenda (BST): Time Session Description Slides Videos 12.00 GMT Welcome and Introduction Mike Bartley,Tessolve 12.00 GMT Agnisys 12.30 GMT Imperas 12.45 GMT Breker 13.00 GMT Close About DVClub The… Auto-generation of Verification Infrastructure for IP to SoC
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CMOS Circuit Techniques for Wireline Transmitters Part II
Synopsys Webinar – Part II In this 3-part Synopsys webinar series, we will present how hyperscale data centers are going through a paradigm shift with the advent of technologies like… CMOS Circuit Techniques for Wireline Transmitters Part II
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Large Eddy CFD Simulation for Automotive Aerodynamics
Wall-modeled large eddy simulations (WMLES) of complex vehicle geometries offer highly accurate results but can be challenging in terms of speed and cost. In this webinar, learn how to maximize… Large Eddy CFD Simulation for Automotive Aerodynamics
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Innovative Designs Enabled by Ansys Solutions – IDEAS 2023
ANSYS’ VIRTUAL USER CONFERENCE FOR ELECTRONICS, SEMICONDUCTORS AND PHOTONICS DESIGNERS Join us for the IDEAS Digital Forum — a place to catch up on industry best practices and the latest… Innovative Designs Enabled by Ansys Solutions – IDEAS 2023
12 events found.