ASIP
ASIP Virtual Seminar 2022
Extending RISC Processors into Flexible Accelerators using ASIP Designer Case Studies in Artificial Intelligence and Image Signal Processing The slow-down of Moore’s law and Dennard scaling has triggered an increased awareness of application-specific instruction-set processors (ASIPs). These processors implement a specialized instruction-set architecture (ISA) tailored to the application domain, often starting from a baseline such… Read More »ASIP Virtual Seminar 2022
Extending Processors into Flexible Accelerators for 5G
The slowing down of Moore’s law and Dennard scaling has triggered an increased interest in application-specific instruction set processors (ASIPs). ASIPs implement a specialized instruction set architecture (ISA) tailored to the application and can replace traditional fixed-function hardware accelerators, thereby introducing software-programmability in the acceleration domain, and thus more flexibility and agility in both the… Read More »Extending Processors into Flexible Accelerators for 5G
ASIP University Day 2022
Application-specific instruction set processors (ASIPs) have established themselves as an important implementation option for modern SoCs, i.e. when standard processor IP cannot meet challenging application-specific requirements, and fixed hardware is not flexible enough. Synopsys’ ASIP Designer is the market leading tool for ASIP design, verification and programming, and is used by leading companies around the… Read More »ASIP University Day 2022
Extending RISC Processors into Flexible Accelerators using ASIP Designer
Case Studies in Low-Power Smart Vision and Post-Quantum Cryptography Applications The slow-down of Moore’s law and Dennard scaling triggered an increased awareness for application-specific instruction-set processors (ASIPs). These processors implement a specialized instruction-set architecture (ISA) tailored to the application domain, often starting from a baseline such as the RISC-V ISA. ASIPs can replace traditional fixed-function… Read More »Extending RISC Processors into Flexible Accelerators using ASIP Designer