Cadence

IP-SOC China 22
The semiconductor world has to face a worldwide accelerated evolution, never seen before, both in terms of technology evolution (3D Packaging, advanced nodes) as well as new applications (IoT, Artificial Intelligence, Automotive, Security, etc) triggering an increasing demand of Semiconductor resources. D&R IP SoC Event Series is fully dedicated to IP (Silicon Intellectual property) and… IP-SOC China 22

AI Hardware Summit
Santa Clara Marriott 2700 Mission College Blvd, Santa Clara, CA, United StatesThe AI Hardware Summit is the premier commercial event focused on systems-first machine learning. Our community’s goal is to reduce time-to-value in the ML lifecycle, and to unlock new possibilities for AI development. This involves a full-stack effort of efficient operationalization of AI in organizations, productionization of models, tight hw/sw co-design and best-in-class microarchitectures.… AI Hardware Summit

CadenceLIVE Boston 2022
Boston Marriott Burlington One Burlington Mall Road, Burlington, MA, United StatesCadenceLIVE Boston 2022 is back, this time in person and will be held on September 14 at the Boston Marriott Burlington. The event features peer presentations that offer solutions for today's design challenges that will impact tomorrow's products. CadenceLIVE brings users, developers, and industry experts together to network, share ideas, and inspire design creativity. Attendees… CadenceLIVE Boston 2022

ESSCIRC 2022
Università degli Studi di MILANO - BICOCCA Viale Piero e Alberto Pirelli, 22, Milano, ItalyThe aim of ESSDERC and ESSCIRC is to provide an annual European forum for the presentation and discussion of recent advances in solid-state devices and circuits. The level of integration for system-on- chip design is rapidly increasing. This is made available by advances in semiconductor technology. Therefore, more than ever before, a deeper interaction among technologists, device experts, IC… ESSCIRC 2022

Xcelium Apps: Everything You Need in the Simulation Metaverse
Register for this CadenceTECHTALK if you are looking for an end-to-end solution for all your verification requirements in automotive, mobile, and hyperscale designs. This CadenceTECHTALK introduces Xcelium Apps, a portfolio of domain-specific technologies implemented natively on the Cadence Xcelium Logic Simulator. The Xcelium Apps are a paradigm shift in the way verification is being done,… Xcelium Apps: Everything You Need in the Simulation Metaverse

From MATLAB to Optimized RTL in Minutes
As semiconductor process technology advances, predicting and achieving design power, performance, and area (PPA) goals become increasingly difficult. Developing high-performance algorithms for AI and signal processing is particularly challenging as algorithm development is abstracted from design implementation, often resulting in late discovery of performance issues. To mitigate this challenge, Cadence and MathWorks have collaborated to… From MATLAB to Optimized RTL in Minutes

Samsung Foundry Forum & SAFE Forum 2022 – US
Signia by Hilton 170 S Market Street, San Jose, CA, United StatesThrough the various session programs, clients, partners, and experts in each field will be able to meet again in person and prepare to go forth into the new future of the semiconductor market. The 2022 Samsung Foundry Forum and SAFE Forum are in-person events, and will be held in San Jose in the U.S.,Munich… Samsung Foundry Forum & SAFE Forum 2022 – US

IESA Vision Summit 2022
The LaLIT Bangalore, IndiaThe 17th edition of IESA flagship event, IESA Vision Summit 2022 is scheduled on 12th and 13th October 2022 in Bengaluru. This is our flagship event where most of the Semiconductor and ESDM companies from India and the world come under one roof. The objective of the event is to enable DESIGN IN INDIA and… IESA Vision Summit 2022

Cadence Further Streamlines MMIC, RFIC, and RF SiP Design Workflows
Demand for next-generation wireless communication, aerospace, and transportation systems is driving the need for high-performance, cost-sensitive silicon RFICs and III-V compound semiconductor monolithic microwave integrated circuits (MMICs), often integrated into advanced system-in-package (SiP) modules. Join us as we demonstrate how the key new features of the Cadence® AWR Design Environment platform: Accelerates design entry and platform design sharing to… Cadence Further Streamlines MMIC, RFIC, and RF SiP Design Workflows

Jasper User Group 2022
Cadence San Jose, CA, United StatesReady to share and discuss the latest design and verification best practices with your peers from around the world? It’s time for our annual Jasper™ User Group Conference held on October 19 and 20 at the Cadence San Jose campus. This interactive, in-depth technical conference connects designers, verification engineers, and engineering managers from around the… Jasper User Group 2022

Best Practices to Achieve the Highest Performance using Xcelium Logic Simulator
Simulator performance is critical owing to the exponentially increasing complexity of SoC designs and shrinking market time. Cadence® Xcelium™ is a leader in simulation performance, and we focus relentlessly on improving the core performance of the simulator. We keep developing new performance optimizations that are delivered with each new release of Xcelium. It is easy to achieve… Best Practices to Achieve the Highest Performance using Xcelium Logic Simulator

Protium Enterprise Prototyping: Higher Productivity, Lower Costs
Prototyping has become essential for chip and IP developers as they deal with exponentially greater testing requirements that come with growing design size, software content, and input data and workloads to run. The increasing complexity in prototyping has naturally increased costs, both in hardware, tools, and engineering talent. For many projects, build-your-own prototypes are no… Protium Enterprise Prototyping: Higher Productivity, Lower Costs