Latest Past Events

AI-Driven EM-IR Design Closure

IR drop closure is becoming a major challenge for designers on advanced nodes. The number of violations at signoff has increased significantly, leading to longer turnaround time (TAT) or violations… 

Tackling Advanced Analog FinFET Back-End Design Challenges

The layout implementation of analog circuits in advanced FinFET technologies is becoming increasingly complex and challenging, with many new design rules to consider and multi-patterning, density rules, matching, and EM-IR…